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    METHOD FOR CREATING NARROW TRENCHES IN DIELECTRIC MATERIALS
    33.
    发明申请
    METHOD FOR CREATING NARROW TRENCHES IN DIELECTRIC MATERIALS 有权
    在电介质材料中形成窄轨的方法

    公开(公告)号：US20070066028A1

    公开(公告)日：2007-03-22

    申请号：US11532190

    申请日：2006-09-15

    Applicant: Gerald Beyer

    Inventor： Gerald Beyer

    IPC: H01L21/76

    CPC classification number: H01L21/31111 ,  B81C1/00595 ,  B81C2201/0132 ,  B81C2201/0133 ,  H01L21/31633 ,  H01L21/76224 ,  H01L21/76816

    Abstract: A method for producing narrow trenches in semiconductor devices. The narrow trenches are formed by chemically changing the properties of a first dielectric layer locally, such that the side walls of a patterned hole in the first dielectric layer is converted locally and becomes etchable by a first etching substance. Subsequently a second dielectric material is deposited in the patterned structure and the damaged part of the first dielectric material is removed such that small trenches are obtained.

    Abstract translation: 一种在半导体器件中制造窄沟槽的方法。 通过局部化学地改变第一电介质层的性质来形成窄沟槽，使得第一介电层中的图案化孔的侧壁被局部地转换并且可被第一蚀刻物质蚀刻。 随后，在图案化结构中沉积第二介电材料，并且去除第一介电材料的损坏部分，从而获得小的沟槽。

    Micro-machined electromechanical system (MEMS) accelerometer device having arcuately shaped flexures
    35.
    发明授权
    Micro-machined electromechanical system (MEMS) accelerometer device having arcuately shaped flexures 失效
    具有弧形弯曲的微加工机电系统（MEMS）加速度计装置

    公开(公告)号：US06991957B2

    公开(公告)日：2006-01-31

    申请号：US11000652

    申请日：2004-11-30

    Applicant: Mark H. Eskridge

    Inventor： Mark H. Eskridge

    IPC: H01L21/00

    CPC classification number: G01P15/125 ,  B81B3/0051 ,  B81B2201/0235 ,  B81B2203/0181 ,  B81B2203/058 ,  B81C2201/0133 ,  G01P15/08 ,  G01P15/097 ,  G01P2015/0828 ,  G01P2015/0831

    Abstract: A method for suspending a movable structure form a support structure wherein first and second flat and thin arcuately shaped flexures are formed having spaced apart substantially planar and parallel opposing surfaces, each of the first and second flexures being structured for connection between a support structure and a movable structure to be suspended from the support structure and being aligned along a common axis of rotation between the support structure and the movable structure.

    Abstract translation: 一种用于将可移动结构悬挂形成支撑结构的方法，其中形成具有间隔开的基本上平坦且平行的相对表面的第一和第二扁平和细弧形弯曲的弯曲部，所述第一和第二挠曲中的每一个构造成用于在支撑结构和 可移动结构从支撑结构悬挂并且沿着支撑结构和可移动结构之间的公共旋转轴对准。

    Method for producing integrated microsystems
    37.
    发明授权
    Method for producing integrated microsystems 失效
    集成微系统的制作方法

    公开(公告)号：US06960536B2

    公开(公告)日：2005-11-01

    申请号：US10613459

    申请日：2003-07-03

    Applicant: Wilhelm Frey ,  Franz Laermer ,  Christoph Duenn

    Inventor： Wilhelm Frey ,  Franz Laermer ,  Christoph Duenn

    IPC: B81C1/00 ,  C23F1/14 ,  H01L21/306 ,  H01L21/461

    CPC classification number: B81C1/00571 ,  B81C1/00595 ,  B81C2201/0133 ,  B81C2201/016 ,  B81C2203/0735 ,  C23F1/14 ,  H01L21/30604

    Abstract: A method for producing a microsystem that has, situated on a substrate, a first functional layer that includes a conductive area and a sublayer. Situated on the first functional layer is a second mechanical functional layer, which is first initially applied onto a sacrificial layer situated and structured on the first functional layer. In addition, a layer is situated on the side of the sublayer facing away from the conductive area. The layer constitutes a protective layer on the first functional layer that acts in areas during a sacrificial layer etching process so that during removal of the sacrificial layer no etching of the areas of the first functional layer covered by the protective layer occurs, and that in the region of the areas of the first functional layer implemented without the protective layer the sublayer is removed essentially selectively to the conductive area at the same time as the sacrificial layer. Further, a method is described for producing integrated microsystems having silicon-germanium functional layers, sacrificial layers containing germanium, and open metal surfaces. The sacrificial layers containing germanium are at least partially removed in an etching solution, a pH value of the etching solution being kept at least approximately neutral during the etching procedure using a buffer.

    Abstract translation: 一种微系统的制造方法，其具有位于基板上的包括导电区域和子层的第一功能层。 位于第一功能层上的是第二机械功能层，其首先被初始施加到位于第一功能层上并构成的牺牲层上。 此外，层位于子层背离导电区域的一侧。 该层在第一功能层上构成保护层，其在牺牲层蚀刻工艺期间在区域中起作用，使得在去除牺牲层期间不会发生由保护层覆盖的第一功能层的区域的蚀刻， 在没有保护层的情况下实现的第一功能层的区域的区域在与牺牲层同时基本上选择性地去除导电区域。 此外，描述了一种用于制造具有硅 - 锗功能层，包含锗的牺牲层和开放金属表面的集成微系统的方法。 在蚀刻溶液中至少部分地除去含有锗的牺牲层，在使用缓冲液的蚀刻过程中，蚀刻溶液的pH值保持至少大致为中性。

    Method for making a micromechanical device by removing a sacrificial layer with multiple sequential etchants
    38.
    发明申请
    Method for making a micromechanical device by removing a sacrificial layer with multiple sequential etchants 审中-公开
    通过用多个顺序蚀刻剂去除牺牲层来制造微机械装置的方法

    公开(公告)号：US20050045276A1

    公开(公告)日：2005-03-03

    申请号：US10922565

    申请日：2004-08-19

    Applicant: Satyadev Patel ,  Andrew Huibers ,  Gregory Schaadt ,  Peter Heureux

    Inventor： Satyadev Patel ,  Andrew Huibers ,  Gregory Schaadt ,  Peter Heureux

    IPC: B81B3/00 ,  C23F1/00 ,  H01L21/00 ,  H01L21/302 ,  H01L21/306 ,  H01L21/461

    CPC classification number: B81C1/00476 ,  B81C1/00547 ,  B81C2201/0109 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/112 ,  B82Y30/00

    Abstract: An etching method, such as for forming a micromechanical device, is disclosed. One embodiment of the method is for releasing a micromechanical structure, comprising, providing a substrate; providing a sacrificial layer directly or indirectly on the substrate; providing one or more micromechanical structural layers on the sacrificial layer; performing a first etch to remove a portion of the sacrificial layer, the first etch comprising providing an etchant gas and energizing the etchant gas so as to allow the etchant gas to physically, or chemically and physically, remove the portion of the sacrificial layer; performing a second etch to remove additional sacrificial material in the sacrificial layer, the second etch comprising providing a gas that chemically but not physically etches the additional sacrificial material. Another embodiment of the method is for etching a silicon material on or within a substrate, comprising: performing a first etch to remove a portion of the silicon, the first etch comprising providing an etchant gas and energizing the etchant gas so as to allow the etchant gas to physically, or chemically and physically, remove the portion of silicon; performing a second etch to remove additional silicon, the second etch comprising providing an etchant gas that chemically but not physically etches the additional silicon.

    Abstract translation: 公开了一种诸如用于形成微机械装置的蚀刻方法。 该方法的一个实施例是用于释放微机械结构，包括：提供衬底; 在衬底上直接或间接提供牺牲层; 在所述牺牲层上提供一个或多个微机械结构层; 执行第一蚀刻以去除牺牲层的一部分，所述第一蚀刻包括提供蚀刻剂气体并激发蚀刻剂气体，以允许蚀刻剂气体在物理或化学和物理上移除牺牲层的该部分; 执行第二蚀刻以去除牺牲层中的附加牺牲材料，第二蚀刻包括提供化学上但不物理蚀刻附加牺牲材料的气体。 该方法的另一实施例是用于在衬底上或衬底内蚀刻硅材料，包括：执行第一蚀刻以去除硅的一部分，第一蚀刻包括提供蚀刻剂气体并激发蚀刻剂气体以允许蚀刻剂 物理或化学和物理的气体去除硅的部分; 执行第二蚀刻以去除附加的硅，第二蚀刻包括提供蚀刻剂气体，其化学地但不物理地蚀刻附加的硅。

    Multi-functional micro electromechanical silicon carbide accelerometer
    39.
    发明授权
    Multi-functional micro electromechanical silicon carbide accelerometer 失效
    多功能微机电碳化硅加速度计

    公开(公告)号：US06769303B1

    公开(公告)日：2004-08-03

    申请号：US10669587

    申请日：2003-09-24

    Applicant: Robert S. Okojie

    Inventor： Robert S. Okojie

    IPC: G01P1500

    CPC classification number: B81C1/00182 ,  B81B2201/0235 ,  B81C2201/0133 ,  G01P2015/084

    Abstract: A method of bulk manufacturing SiC sensors is disclosed and claimed. Materials other than SiC may be used as the substrate material. Sensors requiring that the SiC substrate be pierced are also disclosed and claimed. A process flow reversal is employed whereby the metallization is applied first before the recesses are etched into or through the wafer. Aluminum is deposited on the entire planar surface of the metallization. Photoresist is spun onto the substantially planar surface of the Aluminum which is subsequently masked (and developed and removed). Unwanted Aluminum is etched with aqueous TMAH and subsequently the metallization is dry etched. Photoresist is spun onto the still substantially planar surface of Aluminum and oxide and then masked (and developed and removed) leaving the unimidized photoresist behind. Next, ITO is applied over the still substantially planar surface of Aluminum, oxide and unimidized photoresist. Unimidized and exposed photoresist and ITO directly above it are removed with Acetone. Next, deep reactive ion etching attacks exposed oxide not protected by ITO. Finally, hot phosphoric acid removes the Al and ITO enabling wires to connect with the metallization. The back side of the SiC wafer may be also be etched.

    Abstract translation: 公开并要求保护大量SiC传感器的方法。 SiC以外的材料可以用作基板材料。 还公开并要求保护要求穿透SiC衬底的传感器。 采用工艺流程逆转，由此首先在将凹槽蚀刻入或通过晶片之前施加金属化。 铝沉积在金属化的整个平面上。 将光致抗蚀剂旋转到铝的基本平坦的表面上，随后被掩蔽（并显影和除去）。 用TMAH水溶液蚀刻不需要的铝，随后金属化被干蚀刻。 将光致抗蚀剂旋转到铝和氧化物的仍然基本上平坦的表面上，然后掩蔽（并显影和除去），留下未加蚀刻的光致抗蚀剂。 接下来，将ITO施加在铝，氧化物和未牺牲光致抗蚀剂的仍然基本平坦的表面上。 用丙酮除去其上直接上方的无定影和曝光的光致抗蚀剂和ITO。 接下来，深层反应离子蚀刻暴露了不受ITO保护的氧化物。 最后，热磷酸去除Al和ITO使电线与金属化连接。 也可以对SiC晶片的背面进行蚀刻。

    High density wafer production method
    40.
    发明授权
    High density wafer production method 失效
    高密度晶圆生产方法

    公开(公告)号：US06693045B2

    公开(公告)日：2004-02-17

    申请号：US09683692

    申请日：2002-02-04

    Applicant: Tsung-Ping Hsu ,  In-Yao Lee ,  Hung-Sheng Hu ,  Chung-Cheng Chou ,  Wei-Lin Chen

    Inventor： Tsung-Ping Hsu ,  In-Yao Lee ,  Hung-Sheng Hu ,  Chung-Cheng Chou ,  Wei-Lin Chen

    IPC: H01L2100

    CPC classification number: B81C1/00626 ,  B81C2201/0133 ,  B81C2201/016

    Abstract: A gradational etching method for high density wafer production. The gradational etching method acts on a substrate having a first passivation layer and a second passivation layer on a top surface and a bottom surface, respectively, of the substrate. A first etching process is performed to simultaneously etch the substrate and the first passivation layer to remove the first passivation layer. Finally, a second etching process is performed to etch the substrate to a designated depth that is used to control the thickness of the wafer after the second etching process.

    Abstract translation: 用于高密度晶片生产的渐变蚀刻方法。 分级蚀刻方法分别作用于具有基板的顶表面和底表面上的第一钝化层和第二钝化层的基板上。 执行第一蚀刻工艺以同时蚀刻衬底和第一钝化层以去除第一钝化层。 最后，执行第二蚀刻工艺以将衬底蚀刻到用于在第二蚀刻工艺之后控制晶片的厚度的指定深度。

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