公开(公告)号：US09767913B2

公开(公告)日：2017-09-19

申请号：US15343484

申请日：2016-11-04

Applicant: Toshiba Memory Corporation

Inventor： Hiroyuki Nagashima

IPC: G11C16/04 ,  G11C16/26 ,  G06F11/10 ,  G11C11/56 ,  G11C16/34 ,  G11C16/14 ,  G11C16/24 ,  G06F11/34

CPC classification number: G11C16/26 ,  G06F11/1048 ,  G06F11/3466 ,  G06F2201/88 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/14 ,  G11C16/24 ,  G11C16/34 ,  G11C16/3418

Abstract: According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, a voltage generation unit and a control unit. The nonvolatile semiconductor memory device includes a memory cell array having a plurality of blocks each including a plurality of memory cells, and a voltage generation unit configured to change a read level of the memory cell. The control unit controls write, read, and erase of the nonvolatile semiconductor memory device. The control unit changes the read level between a start of use of the nonvolatile semiconductor memory device and a timing after an elapse of a time.

公开(公告)号：US09766999B2

公开(公告)日：2017-09-19

申请号：US14292140

申请日：2014-05-30

Applicant: Intel Corporation

Inventor： Jonathan D. Combs ,  Michael W. Chynoweth ,  Jason W. Brandt ,  Corey D. Gough

IPC: G06F11/00 ,  G06F11/34

CPC classification number: G06F11/348 ,  G06F11/3466 ,  G06F2201/86 ,  G06F2201/88

Abstract: In accordance with embodiments disclosed herein, there is provided systems and methods for monitoring performance of a processing device to manage non-precise events. A processing device includes a performance counter to increment upon occurrence of a non-precise event in the processing device. The processing device also includes a precise event based sampling (PEBS) enable control communicably coupled to the performance counter. The processing device also includes a PEBS handler to generate and store a PEBS record including an architectural metadata defining a state of the processing device at a time of generation of the PEBS record. The processing device further includes a non-precise event based sampling (NPEBS) module communicably coupled to the PEBS control and the PEBS handler. The NPEBS module causes the PEBS handler to generate the PEBS record for the non-precise event upon overflow of the performance counter.

公开(公告)号：US20170262352A1

公开(公告)日：2017-09-14

申请号：US15329877

申请日：2014-09-23

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： JEFFREY KEVIN JEANSONNE ,  BORIS BALACHEFF ,  VALIUDDIN ALI ,  CHRIS I DALTON ,  DAVID PLAQUIN

IPC: G06F11/30 ,  G06F9/44 ,  G06F21/57

CPC classification number: G06F11/302 ,  G06F11/3003 ,  G06F11/3419 ,  G06F11/3466 ,  G06F21/566 ,  G06F21/572 ,  G06F21/575 ,  G06F2201/81 ,  G06F2201/865 ,  G06F2201/88

Abstract: Examples herein disclose monitoring an expected functionality upon execution of a system management mode (SMM) BIOS code. The examples detect whether a change has occurred to the SMM BIOS code based on the monitoring of the expected functionality. The change indicates that the SMM BIOS code is compromised.

公开(公告)号：US20170262290A1

公开(公告)日：2017-09-14

申请号：US15438679

申请日：2017-02-21

Applicant: Intel Corporation

Inventor： AHMAD YASIN ,  PEGGY J. IRELAN ,  OFER LEVY ,  EMILE ZIEDAN ,  GRANT G. ZHOU

IPC: G06F9/38 ,  G06F11/34

CPC classification number: G06F9/3861 ,  G06F9/3857 ,  G06F11/3466 ,  G06F11/3476 ,  G06F2201/86 ,  G06F2201/88

Abstract: Some implementations provide techniques and arrangements for causing an interrupt in a processor in response to an occurrence of a number of events. A first event counter counts the occurrences of a type of event within the processor and outputs a signal to activate a second event counter in response to reaching a first predefined count. The second event counter counts the occurrences of the type of event within the processor and causes an interrupt of the processor in response to reaching a second predefined count.

公开(公告)号：US09753731B1

公开(公告)日：2017-09-05

申请号：US14598565

申请日：2015-01-16

Applicant: The MathWorks, Inc.

Inventor： Milos Puzovic

IPC: G06F9/44 ,  G06F9/30 ,  G06F9/45 ,  G06F11/34

CPC classification number: G06F9/30181 ,  G06F8/4441 ,  G06F11/3409 ,  G06F11/3419 ,  G06F11/3428 ,  G06F11/3466 ,  G06F11/348 ,  G06F11/3495 ,  G06F2201/88

Abstract: Methods and systems for analyzing and improving performance of computer codes. In some embodiments, a method comprises executing, via one or more processors, program code; collecting, via the one or more processors, one or more hardware dependent metrics for the program code; identifying an execution anomaly based on the one or more hardware dependent metrics, wherein the execution anomaly is present when executing the program code; and designing a modification of the program code via the one or more processors, wherein the modification addresses the execution anomaly. In some other embodiments, a method comprises collecting one or more hardware independent metrics for program code; receiving one or more characteristics of a computing device; and estimating, based on the one or more hardware independent metrics and the one or more characteristics, a duration for execution of the program code on the computing device.

公开(公告)号：US20170242782A1

公开(公告)日：2017-08-24

申请号：US15051503

申请日：2016-02-23

Applicant: FUJITSU LIMITED

Inventor： Hiroaki YOSHIDA ,  Ripon Kumar SAHA ,  Mukul R. PRASAD

IPC: G06F11/36 ,  G06F17/30

CPC classification number: G06F11/3688 ,  G06F9/44589 ,  G06F11/362 ,  G06F11/3664 ,  G06F11/3692 ,  G06F17/3053 ,  G06F2201/81 ,  G06F2201/86 ,  G06F2201/865 ,  G06F2201/88

Abstract: According to an aspect of an embodiment, a method may include identifying a fault at a fault location in a software program using a test suite. The method may also include determining multiple textual similarity scores by determining a textual similarity score with respect to each of multiple repair candidates for the fault. In addition, the method may include sorting the repair candidates based on the textual similarity scores. The method may also include selecting a particular repair candidate from the repair candidates based on the sorting. Moreover, the method may include implementing the particular repair candidate at the fault location based on the selection of the particular repair candidate.

公开(公告)号：US20170222947A1

公开(公告)日：2017-08-03

申请号：US15416709

申请日：2017-01-26

Applicant: Oracle International Corporation

Inventor： Bjørn Dag Johnsen ,  Arvind Srinivasan ,  Brian Manula

IPC: H04L12/911 ,  H04L29/06

CPC classification number: H04L43/0876 ,  G06F9/451 ,  G06F11/3006 ,  G06F2201/88 ,  G11C15/00 ,  H04L45/7457 ,  H04L47/20 ,  H04L47/70 ,  H04L49/25 ,  H04L49/358 ,  H04L67/1097 ,  H04L69/22

Abstract: System and method providing resource access control within a single partition in a network switch environment in a high performance computing environment. A resource request portion of an IB packet includes data identifying a resource request for a requested resource, and a context identification portion of the packet includes data identifying a context of the resource request. Access rights to a controlled resource are determined based on the requested resource relative to the controlled resource and according to a comparison of the context of the resource request relative to one or more valid request context values. A resource table storing valid Q_Key and P_Key context values may be indexed by a Dest. QP of the packet header to determine selective access to the controlled resource and/or to data relating to the controlled resource.

公开(公告)号：US09720744B2

公开(公告)日：2017-08-01

申请号：US13995566

申请日：2011-12-28

Applicant: Laura A. Knauth ,  Peggy J. Irelan

Inventor： Laura A. Knauth ,  Peggy J. Irelan

IPC: G06F9/46 ,  G06F9/54 ,  G06F11/34

CPC classification number: G06F9/54 ,  G06F11/348 ,  G06F2201/88

Abstract: A system and method for a performance monitoring hardware unit that may include logic to poll one or more performance monitoring shared resources and determine a status of each performance monitoring shared resource. The performance monitoring hardware unit may also include an interface to provide the status to allow programming of the one or more performance monitoring shared resource. The status may correspond to a usage and/or an errata condition. Thus, the performance monitoring hardware unit may prevent programming conflicts of the one or more performance monitoring shared resources.

公开(公告)号：US09706004B2

公开(公告)日：2017-07-11

申请号：US13858010

申请日：2013-04-06

Applicant: Citrix Systems, Inc.

Inventor： Mahesh Mylarappa ,  Meghashree Iyengar ,  Saravana Annamalaisami ,  Rajesh Joshi

IPC: H04L29/08 ,  G06F11/30 ,  H04L12/26

CPC classification number: H04L67/2819 ,  G06F11/006 ,  G06F11/3006 ,  G06F11/3089 ,  G06F11/3409 ,  G06F11/3419 ,  G06F11/3433 ,  G06F11/3495 ,  G06F2201/875 ,  G06F2201/88 ,  H04L43/026 ,  H04L43/06 ,  H04L43/08 ,  H04L67/2804

Abstract: The present disclosure is directed towards systems and methods for application performance measurement. A device may receive a first document for transmission to a client, comprising instructions for the client to transmit a request for an embedded object. A flow monitor executed the device may generate a unique identification associated with the first document, the unique identification identifying a first access of the first document, and transmit the first document and unique identification to the client. The device may receive, from the client, a request for the embedded object comprising the unique identification, and transmit, to a server, the request for the embedded object at a transmit time. The device may receive, from the server, the embedded object at a receipt time, and may transmit a performance record comprising an identification of the object, the server, the transmit time, the receipt time, and the unique identification to a data collector.

公开(公告)号：US09697126B2

公开(公告)日：2017-07-04

申请号：US14860993

申请日：2015-09-22

Applicant: QUALCOMM Incorporated

Inventor： Derek Robert Hower ,  Harold Wade Cain, III

IPC: G06F12/08 ,  G06F11/34 ,  G06F12/084 ,  G06F12/0846 ,  G06F12/0864 ,  G06F12/0895

CPC classification number: G06F12/084 ,  G06F11/3037 ,  G06F11/3433 ,  G06F11/3466 ,  G06F11/3471 ,  G06F11/348 ,  G06F12/0846 ,  G06F12/0848 ,  G06F12/0864 ,  G06F12/0895 ,  G06F2201/88 ,  G06F2201/885 ,  G06F2212/1016 ,  G06F2212/1044 ,  G06F2212/2112 ,  G06F2212/282 ,  G06F2212/314 ,  Y02D10/13

Abstract: Generating approximate usage measurements for shared cache memory systems is disclosed. In one aspect, a cache memory system is provided. The cache memory system comprises a shared cache memory system. A subset of the shared cache memory system comprises a Quality of Service identifier (QoSID) tracking tag configured to store a QoSID tracking indicator for a QoS class. The shared cache memory system further comprises a cache controller configured to receive a memory access request comprising a QoSID, and is configured to access a cache line corresponding to the memory access request. The cache controller is also configured to determine whether the QoSID of the memory access request corresponds to a cache line assigned to the QoSID. If so, the cache controller is additionally configured to update the QoSID tracking tag.