公开(公告)号：US20110006106A1

公开(公告)日：2011-01-13

申请号：US12887542

申请日：2010-09-22

Applicant: Koichi KANRYO ,  Akio KATSUBE ,  Akira TANAKA

Inventor： Koichi KANRYO ,  Akio KATSUBE ,  Akira TANAKA

IPC: B23K31/02

CPC classification number: H05K1/0218 ,  H01L23/552 ,  H01L24/97 ,  H01L25/165 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/15159 ,  H01L2924/19105 ,  H05K3/0052 ,  H05K3/284 ,  H05K2201/098 ,  H05K2203/1316 ,  H01L2224/81

Abstract: A method for manufacturing an electronic component module is performed such that a shield layer can be formed as a thin film and an electronic component can be effectively shielded. A collective substrate including a plurality of electronic component modules including a plurality of electronic components is batch-sealed with a resin. A cut section is formed from a top surface of the sealed resin to a position that reaches a grounding electrode arranged in the substrate at a boundary section of the electronic component module so as to expose the grounding electrode. A conductive paste is applied on side surfaces and the top surface. Then, a conductive thin film is formed by spin coating, and the electronic component module is cut.

Abstract translation: 执行电子部件模块的制造方法，使得可以形成屏蔽层作为薄膜，并且可以有效地屏蔽电子部件。 包括多个电子部件的多个电子部件模块的集合基板用树脂进行间歇式密封。 切割部从密封树脂的顶表面形成到在电子部件模块的边界部分到达布置在基板中的接地电极的位置，以露出接地电极。 在侧表面和顶表面上施加导电膏。 然后，通过旋涂形成导电性薄膜，切断电子部件模块。

公开(公告)号：US07821204B2

公开(公告)日：2010-10-26

申请号：US11939325

申请日：2007-11-13

Applicant: Sung-Tae Kim

Inventor： Sung-Tae Kim

IPC: H01J17/49 ,  H01L31/0312 ,  C25B9/00

CPC classification number: H05K3/361 ,  H01J11/10 ,  H01J11/46 ,  H05K1/117 ,  H05K3/323 ,  H05K2201/09427 ,  H05K2201/098

Abstract: A plasma display apparatus comprising a connector is provided. The plasma display apparatus comprises a plasma display panel comprising an electrode of a predetermined width and a connector comprising an electrode line of a width narrower than the predetermined width of the electrode to supply a driving signal to the electrode. A distance between the electrode line and an adjacent electrode line is longer than a distance between the electrode and an adjacent electrode.

Abstract translation: 提供了包括连接器的等离子体显示装置。 等离子体显示装置包括等离子体显示面板，其包括预定宽度的电极和包括宽度比电极的预定宽度窄的电极线的连接器，以向电极提供驱动信号。 电极线和相邻电极线之间的距离比电极和相邻电极之间的距离长。

公开(公告)号：US07816754B2

公开(公告)日：2010-10-19

申请号：US11762479

申请日：2007-06-13

Applicant: Paul Marlan Harvey

Inventor： Paul Marlan Harvey

IPC: H01L29/06 ,  H01L29/40

CPC classification number: H01L23/49816 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/00014 ,  H05K1/111 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4652 ,  H05K2201/098 ,  H05K2201/0989 ,  Y02P70/611 ,  H01L2224/0401

Abstract: The present invention provides for a BGA solder ball interconnection to an outer conductive layer of a laminated circuit assembly having an underlying circuit layer. The invention includes a raised BGA solder ball pad substantially co-planar with the outer conductive layer, the raised pad having a raised face and a plurality of vertical conductive walls and a BGA solder ball having an average diameter of greater than the width of the raised face, the BGA solder ball being adhered to the raised face and to a substantial portion of the vertical conductive walls.

Abstract translation: 本发明提供了一种BGA焊球与具有下层电路层的叠层电路组件的外导电层的互连。 本发明包括与外部导电层基本上共面的升高的BGA焊球垫，凸起垫具有凸起面和多个垂直导电壁以及具有大于凸起宽度的平均直径的BGA焊球 BGA焊球粘附到凸起面和垂直导电壁的大部分上。

公开(公告)号：US20100252308A1

公开(公告)日：2010-10-07

申请号：US12821196

申请日：2010-06-23

Applicant: Toru Nakai ,  Masanori Tamaki

Inventor： Toru Nakai ,  Masanori Tamaki

IPC: H05K1/03

CPC classification number: H05K1/0242 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/0216 ,  H05K1/0245 ,  H05K3/28 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/09236 ,  H05K2201/098

Abstract: A printed wiring board including resin insulation layers, and conductive circuits formed between the resin insulation layers such that spaces between the conductive circuits are filled with a resin material of the resin insulation layers. The conductor circuits include a first conductive circuit and a second conductive circuit positioned adjacent to the first conductive circuit, each of the first and second conductive circuits has a trapezoidal cross section, and the first and the second conductive circuits satisfy a formula, 0.10T≦|W1−W2|≦0.73T where W1 represents a width of a space between upper surfaces of the first and second conductive circuits, W2 represents a width of a space between lower surfaces of the first and second conductive circuits, and T represents a thickness of each of the first and second conductive circuit.

Abstract translation: 一种包括树脂绝缘层的印刷线路板和形成在树脂绝缘层之间的导电电路，使得导电电路之间的空间被树脂绝缘层的树脂材料填充。 所述导体电路包括第一导电电路和邻近所述第一导电电路定位的第二导电电路，所述第一和第二导电电路中的每一个具有梯形横截面，并且所述第一和第二导电电路满足公式：0.10T＆nlE; | W1-W2 |＆nlE; 0.73T其中W1表示第一和第二导电电路的上表面之间的间隔的宽度，W2表示第一和第二导电电路的下表面之间的空间的宽度，T表示 每个第一和第二导电电路的厚度。

公开(公告)号：US20100244274A1

公开(公告)日：2010-09-30

申请号：US12727617

申请日：2010-03-19

Applicant: Takeshi ISHITSUKA ,  Tomoyuki Akahoshi

Inventor： Takeshi ISHITSUKA ,  Tomoyuki Akahoshi

IPC: H01L23/522 ,  H05K1/11 ,  H01L23/48

CPC classification number: H05K1/0216 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/50 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/14 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/098 ,  H01L2924/00

Abstract: A wiring board includes a first conductor constituting a signal line, a second conductor constituting a ground conductor or a power conductor, a dielectric layer disposed between and separately the first and second conductors, and a third conductor arranged between the first and second conductor, the third conductor being connected to the second conductor, and having a width narrower than that of the first conductor, the third conductor entirely opposing the first conductor, the entire portion of the third conductor being covered by the first conductor.

Abstract translation: 布线板包括构成信号线的第一导体，构成接地导体或电力导体的第二导体，设置在第一和第二导体之间和分开的第一和第二导体之间的电介质层，以及布置在第一和第二导体之间的第三导体， 第三导体连接到第二导体，并且具有比第一导体窄的宽度，第三导体与第一导体完全相对，第三导体的整个部分被第一导体覆盖。

公开(公告)号：US07800209B2

公开(公告)日：2010-09-21

申请号：US11620883

申请日：2007-01-08

Applicant: Yukihiro Kozaka ,  Nozomi Shimoishizaka ,  Toshiyuki Fukuda

Inventor： Yukihiro Kozaka ,  Nozomi Shimoishizaka ,  Toshiyuki Fukuda

IPC: H01L23/48 ,  H01L23/488 ,  H01L21/44 ,  H05K3/18 ,  H05K3/06

CPC classification number: H01L21/563 ,  H01L23/49811 ,  H01L23/4985 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/83192 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K1/111 ,  H05K3/243 ,  H05K2201/098 ,  H05K2201/0989 ,  H05K2201/10674 ,  H01L2224/05599

Abstract: A wiring board includes a film base, a plurality of conductive wirings aligned on the film base, and protrusion electrodes formed of a plated metal in the vicinity of end portions of the conductive wirings, respectively. An outer surface at both side portions of the protrusion electrodes in cross section in a width direction of the conductive wirings defines a curve, and the protrusion electrodes in cross section in a longitudinal direction of the conductive wirings define a rectangular shape. The conductive wirings include a first conductive wiring having a wiring width of W1 and a second conductive wiring having a wiring width of W2 larger than W1, and the protrusion electrode on the first conductive wiring and the protrusion electrode on the second conductive wiring have a substantially same height. The wiring board is capable of supporting conductive wirings with a practically enough strength to withstand a stress applied during the connection between the protrusion electrodes of the film base and electrode pads of a semiconductor element, providing sufficient connection stability and coping with a narrow pitch of the semiconductor element.

Abstract translation: 布线基板分别包括膜基底，在基底上排列的多个导电布线，以及在导电配线的端部附近由电镀金属形成的突出电极。 在导电配线的宽度方向上的突起电极的两侧的两侧部的外表面形成曲线，导电配线的纵向截面的突起电极形成矩形。 导电配线包括布线宽度为W1的第一导电布线和布线宽度W2大于W1的第二导电布线，第一导电布线上的突起电极和第二导电布线上的突起电极具有基本上 相同的高度 布线板能够以足够的强度支撑导电布线，以承受在薄膜基底的突起电极和半导体元件的电极焊盘之间的连接期间施加的应力，提供足够的连接稳定性并且应对窄的间距 半导体元件。

公开(公告)号：US07655282B2

公开(公告)日：2010-02-02

申请号：US11699549

申请日：2007-01-30

Applicant: Akifumi Kamijima

Inventor： Akifumi Kamijima

IPC: C23C14/16

CPC classification number: C25D5/022 ,  H01F17/0006 ,  H01F41/042 ,  H01L27/08 ,  H05K1/165 ,  H05K3/108 ,  H05K2201/098 ,  H05K2203/0577 ,  H05K2203/1184 ,  Y10T428/12333 ,  Y10T428/12438 ,  Y10T428/12528 ,  Y10T428/12646 ,  Y10T428/12903

Abstract: A method of forming a patterned thin film comprises the step of forming a frame having an undercut near the bottom thereof on an electrode film, and the plating step of forming the patterned thin film by plating through the use of the frame. The patterned thin film includes a plurality of linear portions disposed side by side. Each of the linear portions has a portion close to the electrode film. This portion has a width greater than the width of the remaining portion of each of the linear portions.

Abstract translation: 形成图案化薄膜的方法包括在电极膜上形成其底部附近具有底切的框架的步骤，以及通过使用框架通过电镀形成图案化薄膜的电镀步骤的步骤。 图案化薄膜包括并排设置的多个直线部分。 每个直线部分具有靠近电极膜的部分。 该部分的宽度大于每个直线部分的剩余部分的宽度。

公开(公告)号：US20090315190A1

公开(公告)日：2009-12-24

申请号：US12306987

申请日：2007-06-29

Applicant: Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

Inventor： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

IPC: H01L23/538 ,  H05K1/11 ,  H01L21/60 ,  H01L21/31

CPC classification number: H05K3/205 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48472 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/244 ,  H05K3/423 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2201/09845 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.

Abstract translation: 布线基板具有绝缘层，多个布线层以通过绝缘层彼此绝缘的方式形成，以及形成在绝缘层中以连接布线层的多个通孔。 在布线层中，形成在绝缘层的一个表面上的表面布线层包括从一个表面露出的第一金属膜和嵌入在绝缘层中并叠放在第一金属膜上的第二金属膜。 第一金属膜的边缘沿着第二金属膜扩展的方向从第二金属膜的边缘突出。 通过以这种方式设计嵌入在绝缘层中的布线层的形状，可以获得在制造过程中可以有效地防止侧蚀刻的高可靠性布线板，并且可以适应电线的小型化和高密度封装 。

公开(公告)号：US07598823B2

公开(公告)日：2009-10-06

申请号：US11715504

申请日：2007-03-08

Applicant: Shih-Kun Yeh

Inventor： Shih-Kun Yeh

IPC: H01P3/08

CPC classification number: H05K1/0237 ,  H01P3/081 ,  H05K1/0393 ,  H05K3/281 ,  H05K2201/0191 ,  H05K2201/09236 ,  H05K2201/09318 ,  H05K2201/098

Abstract: A high-speed digital transmission signal line providing better dynamic resistance to be applied in an LVDS transmission system to function as an electronic line, an optical line, and a serial advanced technology attachment (SATA), comprises a conductive layer in thickness of 0.018˜0.1 mm and in width of 0.2˜0.8 mm; a first and a second insulation layers each in thickness of 0.04˜0.3 mm being respectively disposed on both sides of the conductive layer; and a ground plate.

Abstract translation: 在LVDS传输系统中提供更好的动态电阻的高速数字传输信号线作为电子线路，光线路和串行先进技术附件（SATA）起作用，其厚度为0.018〜 0.1 mm，宽度0.2〜0.8 mm; 分别设置在导电层两侧的厚度为0.04〜0.3mm的第一和第二绝缘层; 和接地板。

公开(公告)号：US20080308307A1

公开(公告)日：2008-12-18

申请号：US11761381

申请日：2007-06-12

Applicant: Jui-Hsien Chang ,  Chi-Chen Lee ,  Dyi-Chung Hu

Inventor： Jui-Hsien Chang ,  Chi-Chen Lee ,  Dyi-Chung Hu

IPC: H05K1/09 ,  H05K3/02

CPC classification number: H05K3/108 ,  H05K3/0041 ,  H05K3/062 ,  H05K3/244 ,  H05K2201/098 ,  H05K2201/2072 ,  H05K2203/1184 ,  Y10T29/49155

Abstract: A trace structure with a particular profile to eliminate stress concentration and the fabricating method thereof are provided. The trace structure includes a conductive line, a seed layer, and a protection layer, wherein an upper part of the trace line is covered by the protection layer to prevent sharp edges caused by over etching in the fabrication of the conductive line. Hence, the stress concentration due to the sharp edges in the trace structure is diminished and the reliability of packaging structures or other devices applying the trace structure is assured.

Abstract translation: 提供具有消除应力集中的特定特征的迹线结构及其制造方法。 迹线结构包括导线，种子层和保护层，其中迹线的上部被保护层覆盖，以防止在导线的制造中由过蚀刻引起的尖锐边缘。 因此，由于痕迹结构中的锋利边缘引起的应力集中减少，并且确保了包装结构或其他应用痕量结构的装置的可靠性。