-
公开(公告)号：US20210239733A1
公开(公告)日：2021-08-05
申请号：US16780595
申请日：2020-02-03
Applicant: SunASIC Technologies, Inc.
Inventor： Chi-Chou LIN , Hsien-Hsueh LEE , Zheng-Ping HE
Abstract: An electronic device having a structure that electrically connects the contactor to an electronic device during a testing process is disclosed. The contactor includes a holder for accommodating the electronic device during the testing process; a flexible circuit, having a first set of contacts electrically connected to the corresponding electrode terminals of the electronic device, and a second set of contacts electrically connected to a control unit that sends test signals during the test process; an elastomer, for adjusting the pressure between the first set of contacts of the flexible circuit and the corresponding electrode terminals of the electronic device while being pressed together; and an alignment tool, for aligning the first set of contacts with the corresponding electrode terminals of the electronic device. The electrode terminals of the electronic device are located on the same surface of the electronic device and the flexible circuit is detachable from the contactor.
-
公开(公告)号：US10578575B2
公开(公告)日：2020-03-03
申请号：US15702814
申请日：2017-09-13
Applicant: SunASIC Technologies, Inc.
Inventor： Chi-Chou Lin , Zheng-Ping He
Abstract: A noise-reduced capacitive sensing unit is disclosed. The noise-reduced capacitive sensing unit includes: a sensing plate; a first bias voltage source for providing a first bias voltage; a second bias voltage source for providing a second bias voltage; a switch unit, connected between two bias voltage sources and the sensing plate, for selectively providing one of the bias voltages to the sensing plate; an excitation signal source for providing a bi-level waveform; a reference capacitor, formed between the excitation signal source and the sensing plate, for injecting the excitation signal to the sensing plate; and a voltage follower for providing sensing results, wherein an input node of the voltage follower is connected to the sensing plate.
-
公开(公告)号：US20190220419A1
公开(公告)日：2019-07-18
申请号：US15869394
申请日：2018-01-12
Applicant: SunASIC Technologies, Inc.
Inventor： Chi Chou LIN , Hao-Jyh LIU , Zheng Ping HE
CPC classification number: G06F12/1408 , G06F21/105 , G06F21/575 , G06F2212/1052 , G06F2221/034 , G06F2221/0768 , G06Q50/184
Abstract: A secure electronic device is disclosed. The secure electronic device includes a first core processing unit, a secure boot Read-Only Memory, a first non-volatile memory, a first volatile memory and a first communication interface. A new framework based on the secure electronic device with built-in security is able to safeguard intellectual property for the developers and further improves the security of the secure electronic device. Thus, more developers can launch their programs or services without being stolen or tampered by an unauthorized party.
-
公开(公告)号：US10133905B2
公开(公告)日：2018-11-20
申请号：US14958982
申请日：2015-12-04
Applicant: SunASIC Technologies, Inc.
Inventor： Chi-Chou Lin , Zheng-Ping He
IPC: G06K9/00
Abstract: A capacitive fingerprint sensing unit and enhanced capacitive fingerprint reader using the capacitive fingerprint sensing units are disclosed. The enhanced capacitive fingerprint reader includes a number of capacitive fingerprint sensing units, forming a fingerprint sensing array; a conductive element; and an excitation signal driver, for providing excitation signals to the conductive element. By increasing the thicknesses of a first inter-metal dielectric layer and a second inter-metal dielectric layer in fingerprint sensing units in the enhanced capacitive fingerprint reader, sensitivity of the enhanced capacitive fingerprint reader can be improved.
-
公开(公告)号：US10042947B2
公开(公告)日：2018-08-07
申请号：US14527956
申请日：2014-10-30
Applicant: SunASIC Technologies, Inc.
Inventor： Chi-Chou Lin
Abstract: A read-only method and a read-only system for operating a portable device are disclosed. The system includes a portable device which has a memory unit and a processing unit, and a host which has a display unit and a processor. A browser requests an access to a portable device inserted to a host. After the storage units been accessed are traced, corresponding service will be performed by the portable device without being blocked by the security system of the host.
-
Patent Agency Ranking
46.发明申请公开(公告)号：US20170344797A1
公开(公告)日：2017-11-30
申请号：US15599498
申请日：2017-05-19
Applicant: SunASIC Technologies, Inc.
Inventor： Chung Hao HSIEH , Zheng Ping HE , Chi Chou LIN
CPC classification number: G06K9/00087 , G06F21/32 , G06K9/00053 , H01L21/561 , H01L23/3121 , H01L24/08 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L2224/02 , H01L2224/29339 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/73265 , H01L2224/83801 , H01L2224/92247 , H01L2924/00014 , H01L2924/181 , H01L2924/19105 , H04L9/3231 , H04M1/667 , H01L2924/00012 , H01L2224/45099 , H01L2924/00
Abstract: A method for packaging fingerprint sensing chips and a fingerprint sensing module using the method are disclosed. The method includes the steps of: A. providing a number of PCBs for packaging fingerprint sensing chips, wherein the PCBs are connected in a form of a panel before cutting; each PCB located in the periphery has a protruding structure on a top surface thereof; each protruding structure connects to adjacent protruding structures to form an cofferdam body; B. mounting a fingerprint sensing chip and other electronic components for each PCB to form a number of PCBAs; C. fixing the PCBAs so that the top surfaces of the fingerprint sensing chips are on the same level substantially; D. dispensing a liquid packaging material to a space enclosed by the cofferdam body; E. curing the liquid packaging material; and F. cutting the connected PCBAs and removing the protruding structure to form independent PCBAs.
-
公开(公告)号：US09760754B2
公开(公告)日：2017-09-12
申请号：US14791534
申请日：2015-07-06
Applicant: SunASIC Technologies, Inc.
Inventor： Chi-Chou Lin , Zheng-Ping He
IPC: H01L31/02 , H01L27/14 , H01L23/02 , G06K9/00 , H01L27/146
CPC classification number: G06K9/00053 , H01L27/14618 , H01L2224/04105 , H01L2224/16225 , H01L2224/18 , H01L2224/24 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2224/73267 , H01L2224/82 , H01L2224/92244 , H01L2924/15153 , H01L2924/00014 , H01L2924/00
Abstract: A Printed Circuit Board Assembly (PCBA) forming an enhanced fingerprint module is disclosed. The PCBA includes a Printed Circuit Board (PCB), an image sensing chip, at least one electrode and a protection layer. An opening in a first insulation layer and a second insulation layer of the PCB together form a sensor portion so that the image sensing chip can be packaged in the opening. Thus, the thickness of the enhanced fingerprint module can be thinner than other fingerprint modules provided by the conventional package methods.
-
公开(公告)号：US20170186716A1
公开(公告)日：2017-06-29
申请号：US15460482
申请日：2017-03-16
Applicant: SunASIC Technologies, Inc.
Inventor： Chi Chou LIN , Zheng Ping HE
IPC: H01L23/00 , H01L23/544 , G06K9/00 , H01L21/78
CPC classification number: H01L24/06 , G06F3/044 , G06K9/00006 , G06K9/00013 , G06K9/0004 , H01L21/76802 , H01L21/7685 , H01L21/76885 , H01L21/78 , H01L23/3171 , H01L23/544 , H01L24/03 , H01L24/05 , H01L2223/5446 , H01L2224/03614 , H01L2224/05026 , H01L2224/06135 , H01L2224/0912
Abstract: A chip with I/O pads on the peripheries and a method making the chip is disclosed. The chip includes: a substrate; a first metal layer, formed above the substrate; an inter-metal dielectric layer, formed above the first metal layer, having concave portions formed along the peripheries of the chip so that a portion of the first metal layer is exposed to form an input-output (I/O) pad in each of the concave portions which are spaced apart from each other; and a passivation layer, formed above the second metal layer without covering the concave portions so that specific circuits are formed by the first metal layer and the second metal layer, respectively. By changing the I/O pad from the top of the chip to the peripheries, the extra thickness of the packaged chip caused by wire bonding in the prior arts can be reduced.
-
公开(公告)号：US09633960B2
公开(公告)日：2017-04-25
申请号：US14755492
申请日：2015-06-30
Applicant: SunASIC Technologies, Inc.
Inventor： Chi-Chou Lin , Zheng-Ping He
CPC classification number: H01L24/06 , G06F3/044 , G06K9/00006 , G06K9/00013 , G06K9/0004 , H01L21/76802 , H01L21/7685 , H01L21/76885 , H01L21/78 , H01L23/3171 , H01L23/544 , H01L24/03 , H01L24/05 , H01L2223/5446 , H01L2224/03614 , H01L2224/05026 , H01L2224/06135 , H01L2224/0912
Abstract: A chip with I/O pads on the peripheries and a method making the chip is disclosed. The chip includes: a substrate; at least two metal layers, formed above the substrate, each metal layer forming a specific circuit, wherein two adjacent metal layers are separated by an inter-metal dielectric layer; and a passivation layer, formed on a top side of the chip. By changing the I/O pad from the top of the chip to the peripheries, the extra thickness of the packaged chip caused by wire bonding in the prior arts can be reduced.
-
公开(公告)号：US09465973B1
公开(公告)日：2016-10-11
申请号：US14662561
申请日：2015-03-19
Applicant: SunASIC Technologies, Inc.
Inventor： Chi-Chou Lin , Zheng-Ping He
IPC: G06K9/00
CPC classification number: G06K9/0002 , G06K9/00033 , G06K9/209
Abstract: An enhanced capacitive fingerprint sensing unit is disclosed. The enhanced capacitive fingerprint sensing unit includes a base structure and a fingerprint sensing structure. The fingerprint sensing structure has a first inter-metal dielectric layer, a second metal layer, a second inter-metal dielectric layer, a third metal layer, and a passivation layer. By connecting the third metal layer to Transient Voltage Suppressor (TVS) device, anti-Electrostatic Discharge (ESD) is available. By increasing the thicknesses of the first inter-metal dielectric layer and the second inter-metal dielectric layer, sensitivity of the enhanced capacitive fingerprint sensing unit can be improved.
Abstract translation: 公开了一种增强型电容式指纹感测单元。 增强电容指纹感测单元包括基本结构和指纹感测结构。 指纹感测结构具有第一金属间介电层，第二金属层，第二金属间介电层，第三金属层和钝化层。 通过将第三金属层连接到瞬态电压抑制器（TVS）器件，可以使用抗静电放电（ESD）。 通过增加第一金属间介电层和第二金属间介电层的厚度，可以提高增强电容式指纹检测单元的灵敏度。
-
-
-
-
-
-
-
-
-
Search Results
55
records
(took 0.017 seconds)
