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公开(公告)号：US20210194363A1
公开(公告)日：2021-06-24
申请号：US17074650
申请日：2020-10-20
Applicant: uPI Semiconductor Corp.
Inventor： Chih-Lien Chang , Chun-Chieh Wang
Abstract: A time signal generating circuit of a power converter and a control method thereof are provided. The time signal generating circuit includes a reference frequency generating circuit, an on-time circuit and a frequency tracking circuit. The reference frequency generating circuit provides a reference frequency signal. The on-time circuit provides an on-time signal according to a first reference signal and a second reference signal. The second reference signal is related to an output voltage of the power converter. The frequency tracking circuit is coupled to the reference frequency generating circuit and the on-time circuit, and compares frequencies of the reference frequency signal and the on-time signal within a default time to generate a tracking signal. The on-time circuit adjusts the second reference signal according to the tracking signal, so that the on-time circuit adjusts the frequency of the on-time signal.
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公开(公告)号：US20210119613A1
公开(公告)日：2021-04-22
申请号：US17016460
申请日：2020-09-10
Applicant: uPI semiconductor corp.
Inventor： Chih-Lien CHANG , Chia-Chien LI
IPC: H03K3/017
Abstract: A plus width modulation (PWM) signal generator is disclosed. The PWM signal generator includes a first signal generator, an output terminal, a first voltage generating circuit and a second voltage generating circuit. The first signal generator provides a first signal. The first voltage generating circuit includes a voltage division circuit and is connected to the first signal generator and the output terminal, and provides a first preset voltage to the output terminal according to the first signal and a voltage division circuit. The second voltage generating circuit is connected to the first signal generator and the output terminal, and provides a second preset voltage to the output terminal according to the first signal. The first present voltage is earlier supplied to the output terminal than the second preset voltage, and after the first preset voltage continues to provide the preset time, the first preset voltage generating circuit stops providing the first preset voltage.
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43.发明申请公开(公告)号：US20200266710A1
公开(公告)日：2020-08-20
申请号：US16740556
申请日：2020-01-13
Applicant: uPI semiconductor corp.
Inventor： HENG-LI LIN , JUNG-HUNG TSENG , HSIN-HAO CHEN
Abstract: A control circuit of a buck-boost converting apparatus is disclosed. The control circuit includes a current sensing circuit and a mode determination circuit. The current sensing circuit senses an output current of the buck-boost converting apparatus and provides a current sensing signal. The mode determination circuit is coupled to the current sensing circuit and receives the current sensing signal. The mode determination circuit generates a default voltage according to the current sensing signal and a default current, and the mode determination circuit generates a switching control signal according to the default voltage and the current sensing signal to control the buck-boost converting apparatus to be operated in a buck mode, a boost mode or a buck-boost mode.
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公开(公告)号：US20200235663A1
公开(公告)日：2020-07-23
申请号：US16731232
申请日：2019-12-31
Applicant: uPI semiconductor corp.
Inventor： CHIH-WEN HSIAO , CHIEN-MING CHEN
Abstract: An output stage circuit of a power conversion circuit includes a first power switch, a driving circuit, a first current source, a second current source and a combining circuit. The first power switch is coupled to a second terminal of a bootstrap capacitor. The driving circuit is coupled to the first terminal of the bootstrap capacitor and the first power switch and provides a control signal to the first power switch. The first current source generates a first current according to the control signal. The second current source generates a second current according to a reference voltage which is a first voltage at the first terminal or a second voltage at the second terminal. The combining circuit, coupled to the driving circuit, the first current source and the second current source, generates a switch operation indicating signal to the driving circuit according to the first current and second current.
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公开(公告)号：US20200235573A1
公开(公告)日：2020-07-23
申请号：US16662042
申请日：2019-10-24
Applicant: uPI Semiconductor Corp.
Inventor： Chih-Hao Chen
IPC: H02H9/04 , H02H3/10 , H01L27/02 , H01L29/866 , H02H3/20
Abstract: Provided is a transient voltage suppression device including a power supply terminal, a ground terminal, a Zener diode, a diode string, and an isolation device. The Zener diode is coupled between the power supply terminal and the ground terminal, and a node is between the Zener diode and the power supply terminal. The diode string has a first terminal, a second terminal, and an input/output (I/O) terminal. The second terminal is coupled to the ground terminal. The isolation device is coupled between the node and the first terminal. When an abnormal current flows through the isolation device and an energy of the abnormal current per unit time exceeds a preset value of the isolation device, the isolation device blocks a path of the abnormal current.
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Patent Agency Ranking
公开(公告)号：US20200153328A1
公开(公告)日：2020-05-14
申请号：US16656818
申请日：2019-10-18
Applicant: uPI semiconductor corp.
Inventor： SHENG-AN KO , BO-ZHOU KE
Abstract: A driving circuit and a switch signal generation method are provided. The driving circuit receives a PWM signal and provides a first switch signal and a second switch signal. The driving circuit includes a logical signal circuit, a lower bridge dead time circuit and a lower bridge driving circuit. The logical signal circuit provides a first logical signal and a second logical signal according to the PWM signal. The lower bridge dead time circuit determines a leading edge of a lower bridge dead time signal according to the first logical signal and determines a trailing edge of lower bridge dead time signal according to a trailing edge of first switch signal. The lower bridge driving circuit determines a leading edge of second switch signal according to second logical signal and determines a trailing edge of second switch signal according to the trailing edge of lower bridge dead time signal.
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公开(公告)号：US10587191B2
公开(公告)日：2020-03-10
申请号：US16262917
申请日：2019-01-31
Applicant: uPI Semiconductor Corp.
Inventor： Chih-Lien Chang , Min-Rui Lai
Abstract: A dc-dc converting circuit and a method for controlling the same are provided. The dc-dc converting circuit includes an output stage, a mode detection circuit, a PWM signal generating circuit and a ramp signal generating circuit. The output stage provides an output voltage. The mode detection circuit provides a mode detection signal. The PWM generating circuit provides a time signal to the output stage. When the dc-dc converting circuit enters a continuous conduction mode from a discontinuous conduction mode, the ramp signal generating circuit provides a second ramp signal to the PWM signal generating circuit in a preset time according to the mode detection signal. The ramp signal generating circuit provides a first ramp signal to the PWM signal generating circuit after the preset time. A slope of the second ramp signal is greater than a slope of the first ramp signal.
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公开(公告)号：US20190296639A1
公开(公告)日：2019-09-26
申请号：US16296454
申请日：2019-03-08
Applicant: uPI semiconductor corp.
Inventor： Chih-Lien CHANG , Pei-Ling HONG , Min-Rui LAI
Abstract: A current mirror calibration circuit, coupled to an error amplifier of a pulse-width modulation controller, includes a first voltage generation unit, a second voltage generation unit, a calibration unit and a current mirror circuit. During an initial period, the first voltage generation unit and second voltage generation unit provide a first default voltage and a second default voltage respectively. The current mirror circuit includes a first current unit and a second current unit. The first current unit receives an original current. The second current unit generates a mirror current having a proportional relationship with original current. The first current unit has a first node coupled to the first voltage generation unit and a second node coupled to a third default voltage. The second current unit has a third node coupled to the second voltage generation unit and calibration unit and a fourth node coupled to calibration unit and an output terminal of error amplifier.
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公开(公告)号：US20190288675A1
公开(公告)日：2019-09-19
申请号：US16296545
申请日：2019-03-08
Applicant: uPI semiconductor corp.
Inventor： CHIH-LIEN CHANG , MIN-RUI LAI
IPC: H03K7/08
Abstract: A pulse-width modulation (PWM) controller including an output pin, a temporary voltage generation circuit and a tri-state voltage generation circuit is disclosed. The temporary voltage generation circuit includes a voltage-dividing unit and a control unit. The voltage-dividing unit is coupled to the output pin and the control unit respectively. The control unit receives an enable signal and a PWM signal. The tri-state voltage generation circuit is coupled to the temporary voltage generation circuit and the output pin and receives the enable signal, the PWM signal and a tri-state input voltage. When the PWM controller is operated in a tri-state mode, the control unit controls the voltage-dividing unit to provide a temporary voltage to the output pin according to the enable signal and PWM signal, and then the tri-state voltage generation circuit provides a tri-state voltage to the output pin according to the enable signal and PWM signal.
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公开(公告)号：US10348203B2
公开(公告)日：2019-07-09
申请号：US15889091
申请日：2018-02-05
Applicant: uPI Semiconductor Corp.
Inventor： Chih-Wen Hsiao , Chih-Lien Chang
Abstract: A DC-to-DC controller, a DC-to-DC power converter and a control method thereof are provided. The controller is coupled to an upper-bridge switch and a lower-bridge switch and includes a time generation unit providing a time signal, a voltage identification (VID) change determining circuit and a time control circuit. The VID change determining circuit provides a determination signal in response to a VID signal. The time control circuit provides a control signal according to the time signal and the determination signal. When the VID signal changes from high to low, the time control circuit turns off the upper-bridge switch for a first preset time according to the determination signal and the time signal, and during the first preset time, the time control circuit controls the lower-bridge switch to be turned on for a second preset time multiple times, and to be turned off for a third preset time multiple times.
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