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    Wafer dicing from wafer backside
    42.
    发明授权
    Wafer dicing from wafer backside 有权
    晶圆切片从晶圆背面

    公开(公告)号：US08975162B2

    公开(公告)日：2015-03-10

    申请号：US14095824

    申请日：2013-12-03

    Applicant: Applied Materials, Inc.

    Inventor： Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Ajay Kumar

    IPC: H01L21/00 ,  H01L21/822 ,  H01L21/78 ,  H01L21/308 ,  H01L21/683

    CPC classification number: H01L21/822 ,  B23K26/0624 ,  B23K26/18 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/3081 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/6834

    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. For example, a method includes applying a protection tape to a wafer front side, the wafer having a dicing tape attached to the wafer backside. The dicing tape is removed from the wafer backside to expose a die attach film disposed between the wafer backside and the dicing tape. Alternatively, if no die attach film is initially disposed between the wafer backside and the dicing tape, a die attach film is applied to the wafer backside at this operation. A water soluble mask is applied to the wafer backside. Laser scribing is performed on the wafer backside to cut through the mask, the die attach film and the wafer, including all layers included within the front side and backside of the wafer. A plasma etch is performed to treat or clean surfaces of the wafer exposed by the laser scribing. A wafer backside cleaning is performed and a second dicing tape is applied to the wafer backside. The protection tape is the removed from the wafer front side.

    Abstract translation: 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 例如，一种方法包括将保护带施加到晶片正面，所述晶片具有附接到晶片背面的切割带。 切割胶带从晶片背面去除，以露出设置在晶片背面和切割胶带之间的管芯附着膜。 或者，如果在晶片背面和切割带之间不设置管芯附着膜，则在该操作中将芯片附着膜施加到晶片背面。 将水溶性掩模施加到晶片背面。 在晶片背面进行激光划线，以切割掩模，芯片附着膜和晶片，包括包括在晶片的正面和背面内的所有层。 执行等离子体蚀刻以处理或清洁由激光划线暴露的晶片的表面。 执行晶片背面清洁，并且将第二切割带施​​加到晶片背面。 保护带从晶片正面去除。

    WAFER DICING WITH WIDE KERF BY LASER SCRIBING AND PLASMA ETCHING HYBRID APPROACH
    43.
    发明申请
    WAFER DICING WITH WIDE KERF BY LASER SCRIBING AND PLASMA ETCHING HYBRID APPROACH 有权
    通过激光切割和等离子体蚀刻混合方法制造出宽阔的KERF

    公开(公告)号：US20140346641A1

    公开(公告)日：2014-11-27

    申请号：US13947890

    申请日：2013-07-22

    Applicant: Applied Materials, Inc.

    Inventor： Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Madhava Rao Yalamanchili ,  Ajay Kumar

    IPC: H01L21/78

    CPC classification number: H01L21/82 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/78 ,  H01L27/04

    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, approaches for wafer dicing with wide kerf by using a laser scribing and plasma etching hybrid approach are described. For example, a method of dicing a semiconductor wafer including a plurality of integrated circuits separated by dicing streets involves forming a mask above the semiconductor wafer, the mask having a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide a patterned mask having a pair of parallel gaps for each dicing street, exposing regions of the semiconductor wafer between the integrated circuits. Each gap of each pair of parallel gaps is separated by a distance. The method also involves etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.

    Abstract translation: 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个示例中，描述了通过使用激光划线和等离子体蚀刻混合方法的具有宽切口的晶片切割的方法。 例如，通过切割由切割街道分离的多个集成电路的半导体晶片的切割方法包括在半导体晶片上形成掩模，该掩模具有覆盖并保护集成电路的层。 该方法还包括用激光划线工艺对掩模进行图案化以提供具有用于每个切割街道的一对平行间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 每对平行间隙的每个间隙分开一段距离。 该方法还包括通过图案化掩模中的间隙蚀刻半导体晶片以对集成电路进行分离。

    Wafer dicing with wide kerf by laser scribing and plasma etching hybrid approach
    44.
    发明授权
    Wafer dicing with wide kerf by laser scribing and plasma etching hybrid approach 有权
    通过激光划线和等离子体蚀刻混合法进行宽切割的晶片切割

    公开(公告)号：US08883614B1

    公开(公告)日：2014-11-11

    申请号：US13947890

    申请日：2013-07-22

    Applicant: Applied Materials, Inc.

    Inventor： Wei-Sheng Lei ,  Brad Eaton ,  Apama Iyer ,  Madhava Rao Yalamanchili ,  Ajay Kumar

    IPC: H01L21/00 ,  H01L21/78

    CPC classification number: H01L21/82 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/78 ,  H01L27/04

    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, approaches for wafer dicing with wide kerf by using a laser scribing and plasma etching hybrid approach are described. For example, a method of dicing a semiconductor wafer including a plurality of integrated circuits separated by dicing streets involves forming a mask above the semiconductor wafer, the mask having a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide a patterned mask having a pair of parallel gaps for each dicing street, exposing regions of the semiconductor wafer between the integrated circuits. Each gap of each pair of parallel gaps is separated by a distance. The method also involves etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.

    Abstract translation: 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个示例中，描述了通过使用激光划线和等离子体蚀刻混合方法的具有宽切口的晶片切割的方法。 例如，通过切割由切割街道分离的多个集成电路的半导体晶片的切割方法包括在半导体晶片上形成掩模，该掩模具有覆盖并保护集成电路的层。 该方法还包括用激光划线工艺对掩模进行图案化以提供具有用于每个切割街道的一对平行间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 每对平行间隙的每个间隙分开一段距离。 该方法还包括通过图案化掩模中的间隙蚀刻半导体晶片以对集成电路进行分离。

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