公开(公告)号：US20100020513A1

公开(公告)日：2010-01-28

申请号：US12499364

申请日：2009-07-08

Applicant: Graham Lawson ,  Emmanuel Loiselet

Inventor： Graham Lawson ,  Emmanuel Loiselet

IPC: H05K5/00

CPC classification number: H05K1/0222 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H01L2924/16152 ,  H05K3/4614 ,  H05K3/4623 ,  H05K2201/09236 ,  H05K2201/09481 ,  H05K2201/09536 ,  H05K2201/09609 ,  H05K2201/09618 ,  H01L2924/00014

Abstract: An hermetically sealed integrated microwave circuit comprising a coplanar waveguide on a printed circuit board (PCB) electrically connected on one major surface to an integrated circuit, and thermally and electrically connected to a ball grid array (BGA) on its opposite major surface, in which the PCB has at least first and second printed layers, a microwave signal path extends from a ball of the BGA through a through-hole in both printed layers to the coplanar wave guide, and plural ground paths extend from balls of the BGA through first through-holes in the first printed layer of the PCB and through second through-holes of the second printed layer of the PCB, the first and second through-holes being non-coincident, to allow for an hermetic seal across the PCB whilst introducing a predetermined impedance in the PCB between the signal and ground paths.

Abstract translation: 一种密封的集成微波电路，包括在一个主表面上电连接到集成电路的印刷电路板（PCB）上的共面波导，并且在其相对的主表面上热电连接到球栅阵列（BGA），其中 PCB至少具有第一和第二印刷层，微波信号路径从BGA的球通过两个印刷层中的通孔延伸到共面波导，并且多个接地路径从BGA的球从第一至第 在PCB的第一印刷层中的孔和通过PCB的第二印刷层的第二通孔，第一和第二通孔不重合，以允许穿过PCB的气密密封，同时引入预定的 信号与接地路径之间的PCB阻抗。

公开(公告)号：US20090188712A1

公开(公告)日：2009-07-30

申请号：US12020643

申请日：2008-01-28

Applicant: Mark G. Clark ,  John R. Dangler ,  Matthew S. Doyle ,  Thomas D. Kidd ,  Timothy L. McMillan ,  Jason T. Stoll

Inventor： Mark G. Clark ,  John R. Dangler ,  Matthew S. Doyle ,  Thomas D. Kidd ,  Timothy L. McMillan ,  Jason T. Stoll

IPC: H05K9/00 ,  H05K3/46

CPC classification number: H05K1/0219 ,  H05K1/0393 ,  H05K3/429 ,  H05K2201/0715 ,  H05K2201/09609 ,  H05K2201/09627 ,  H05K2201/10189 ,  Y10T29/49124 ,  Y10T29/49165

Abstract: A flexible multilayer printed circuit assembly with shield fences. The flexible multilayer printed circuit assembly with multiple conductive layers includes logic ground vias that connect logic ground plane layers together, and shield vias that connect a top and a bottom shield plane layer together. Each of the shield fences is formed between the shield vias on an outside perimeter of each of the conductive layers. Each of the shield fences contains the logic ground vias inside, and also contains each corresponding conductive layer in the horizontal direction to which each layer extends.

Abstract translation: 具有屏蔽栅栏的柔性多层印刷电路组件。 具有多个导电层的柔性多层印刷电路组件包括将逻辑接地平面层连接在一起的逻辑接地通孔，以及将顶部和底部屏蔽平面层连接在一起的屏蔽通孔。 每个屏蔽栅栏形成在每个导电层的外周边上的屏蔽通孔之间。 每个屏蔽围栏都包含内部的逻辑接地孔，并且还包含每个层延伸的水平方向上的每个对应的导电层。

公开(公告)号：US07561430B2

公开(公告)日：2009-07-14

申请号：US11799057

申请日：2007-04-30

Applicant: Larry E. Tiedemann ,  Reinhold Henke ,  James P. Hentges ,  Dean R. McCluskey ,  Keith D. Ness ,  Robert A. Pape

Inventor： Larry E. Tiedemann ,  Reinhold Henke ,  James P. Hentges ,  Dean R. McCluskey ,  Keith D. Ness ,  Robert A. Pape

IPC: H05K7/20

CPC classification number: H05K7/20 ,  H05K1/0206 ,  H05K3/42 ,  H05K7/209 ,  H05K2201/09609 ,  H05K2201/09781 ,  H05K2201/10053

Abstract: A power switching device is provided that includes a housing, a printed circuit board disposed within the housing, and a plurality of electrical components mounted to the printed circuit board, including at least one relay. At least one pair of load terminals is connected to the printed circuit board on opposite sides of the relay, and a plurality of heat transfer elements are formed through and in the printed circuit board and are dispersed proximate the relay, around the load terminals, and extending to the peripheral portion.

Abstract translation: 提供一种电源开关装置，其包括壳体，设置在壳体内的印刷电路板，以及安装到印刷电路板的多个电气部件，包括至少一个继电器。 至少一对负载端子连接到继电器的相对侧上的印刷电路板，并且多个传热元件形成在印刷电路板中并且在印刷电路板中并且分散在靠近继电器的环绕负载端子处，并且 延伸到周边部分。

公开(公告)号：US07553055B2

公开(公告)日：2009-06-30

申请号：US11508056

申请日：2006-08-21

Applicant: Cheng-Hung Liu

Inventor： Cheng-Hung Liu

IPC: F21V7/04

CPC classification number: F21V29/86 ,  F21K9/00 ,  F21V29/83 ,  G02B6/003 ,  G02B6/0083 ,  G02B6/0085 ,  G02F1/133603 ,  H05K1/0206 ,  H05K3/0061 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/10106

Abstract: Systems for displaying images are provided. An embodiment of a system comprises a liquid crystal display module, and the liquid crystal display module comprises a backlight assembly. The backlight module primarily includes a circuit board and at least an LED disposed on a first planar side of the circuit board. The circuit board comprises at least a hole and a heat conductor extending through the hole. Heat from the LED on the first planar side is dissipated to a second planar side of the circuit board by the heat conductor through the hole.

Abstract translation: 提供显示图像的系统。 系统的一个实施例包括液晶显示模块，液晶显示模块包括背光组件。 背光模块主要包括电路板和至少设置在电路板的第一平面侧上的LED。 电路板包括至少一个孔和延伸穿过孔的热导体。 来自第一平面侧的LED的热量通过该导热体通过该孔被散发到电路板的第二平面侧。

公开(公告)号：US07465882B2

公开(公告)日：2008-12-16

申请号：US11610082

申请日：2006-12-13

Applicant: Wiren D. Becker ,  Zhaoqing Chen ,  George Katopis

Inventor： Wiren D. Becker ,  Zhaoqing Chen ,  George Katopis

IPC: H05K1/03

CPC classification number: H05K1/0224 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2223/6622 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0219 ,  H05K1/0253 ,  H05K2201/09609 ,  H05K2201/09618 ,  H05K2201/09681 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00

Abstract: Signal line conductors passing through vertical vias in an insulative substrate for supporting and interconnecting integrated circuit chips are provided with shielding conductors in adjacent vias that link respective power and ground planes. The shielding conductors' presence in positions around a signal via is made possible through the employment of power plane and ground plane conductive grids that are laid out in rhomboid patterns. The power plane and ground plane grids possess a left-right mirror relation to one another and are displaced to place the rhomboid's corners to avoid overlapping any of the grid lines.

Abstract translation: 通过垂直通孔的信号线导体在用于支撑和互连集成电路芯片的绝缘基板中设置有连接相应电源和接地层的相邻过孔中的屏蔽导体。 通过使用以菱形图案布置的电源平面和接地平面导电网格，​​可以使屏蔽导体存在于信号通孔周围的位置。 电力平面和地平面网格具有彼此的左右镜像关系，并被置换以放置菱形的角部，以避免重叠任何网格线。

公开(公告)号：US20080129645A1

公开(公告)日：2008-06-05

申请号：US11633769

申请日：2006-12-05

Applicant: Carl W. Berlin ,  Deepukumar M. Nair

Inventor： Carl W. Berlin ,  Deepukumar M. Nair

IPC: H01Q9/30 ,  H01P11/00

CPC classification number: H01Q15/0026 ,  H01P1/2005 ,  H01Q15/006 ,  H05K1/0216 ,  H05K2201/09309 ,  H05K2201/09609 ,  Y10T29/49016

Abstract: A high-frequency Electromagnetic Bandgap (EBG) device, and a method for making the device are provided. The device includes a first substrate including multiple conducting vias forming a periodic lattice. The vias of the first substrate extend from the lower surface of the first substrate to the upper surface of the first substrate. The device also includes a second substrate having multiple conducting vias forming a periodic lattice. The vias of the second substrate extend from the lower surface of the second substrate to the upper surface of the second substrate. The second substrate is positioned adjacent to, and overlapping, the first substrate, such that the lower surface of the second substrate is in contact with the upper surface of the first substrate, and such that a plurality of vias of the second substrate are in contact with a corresponding plurality of vias of the first substrate.

Abstract translation: 提供高频电磁带隙（EBG）装置及其制造方法。 该器件包括包括形成周期性晶格的多个导电通孔的第一衬底。 第一衬底的通孔从第一衬底的下表面延伸到第一衬底的上表面。 该器件还包括具有形成周期性晶格的多个导电通孔的第二衬底。 第二基板的通孔从第二基板的下表面延伸到第二基板的上表面。 第二基板定位成与第一基板相邻并重叠，使得第二基板的下表面与第一基板的上表面接触，并且使得第二基板的多个通孔接触 与第一基板的对应的多个通孔。

公开(公告)号：US20070133221A1

公开(公告)日：2007-06-14

申请号：US11508056

申请日：2006-08-21

Applicant: Cheng-Hung Liu

Inventor： Cheng-Hung Liu

IPC: A47F3/00

CPC classification number: F21V29/86 ,  F21K9/00 ,  F21V29/83 ,  G02B6/003 ,  G02B6/0083 ,  G02B6/0085 ,  G02F1/133603 ,  H05K1/0206 ,  H05K3/0061 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/10106

Abstract: Systems for displaying images are provided. An embodiment of a system comprises a liquid crystal display module, and the liquid crystal display module comprises a backlight assembly. The backlight module primarily includes a circuit board and at least an LED disposed on a first planar side of the circuit board. The circuit board comprises at least a hole and a heat conductor extending through the hole. Heat from the LED on the first planar side is dissipated to a second planar side of the circuit board by the heat conductor through the hole.

Abstract translation: 提供显示图像的系统。 系统的一个实施例包括液晶显示模块，液晶显示模块包括背光组件。 背光模块主要包括电路板和至少设置在电路板的第一平面侧上的LED。 电路板包括至少一个孔和延伸穿过孔的热导体。 来自第一平面侧的LED的热量通过该导热体通过该孔被散发到电路板的第二平面侧。

公开(公告)号：US07173193B2

公开(公告)日：2007-02-06

申请号：US10403148

申请日：2003-03-31

Applicant: William Louis Brodsky ,  Mark Kenneth Hoffmeyer ,  James R. Stack

Inventor： William Louis Brodsky ,  Mark Kenneth Hoffmeyer ,  James R. Stack

IPC: H05K3/02 ,  H05K1/11 ,  H01R12/04

CPC classification number: H05K1/0271 ,  H05K1/0224 ,  H05K1/0253 ,  H05K1/112 ,  H05K2201/0191 ,  H05K2201/093 ,  H05K2201/09609 ,  H05K2201/09681 ,  H05K2201/09718 ,  H05K2201/10719 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A method and structure are provided for implementing enhanced interconnection performance of an electrical connector, such as a land grid array (LGA) module, and a printed wiring board. A multi-layer printed wiring board includes a plurality of predefined ground and power layers. At least one of the predefined ground and power layers includes a thickness variation minimizing structure for minimizing thickness variation. The thickness variation minimizing structure includes a perforated pattern within a selected area of the at least one of the predefined ground and power layers. The selected area is proximate to predefined module sites, such as land grid array (LGA) module sites, in the ground and power layers. The selected area can include regions surrounding each predefined module site, and also can include a region within the module site.

Abstract translation: 提供了一种用于实现电连接器（例如，平面栅格阵列（LGA）模块）和印刷电路板的增强的互连性能的方法和结构。 多层印刷线路板包括多个预定义的接地层和功率层。 预定义的接地层和功率层中的至少一个包括用于最小化厚度变化的厚度变化最小化结构。 厚度变化最小化结构包括在预定义的接地层和功率层中的至少一个的选定区域内的穿孔图案。 所选择的区域靠近预定义的模块站点，例如地面和电力层中的陆地网格阵列（LGA）模块站点。 所选择的区域可以包括围绕每个预定义模块站点的区域，并且还可以包括模块站点内的区域。

公开(公告)号：US07081672B1

公开(公告)日：2006-07-25

申请号：US11073802

申请日：2005-03-07

Applicant: Anand Govind ,  Aritharan Thurairajaratnam ,  Farshad Ghahghahi

Inventor： Anand Govind ,  Aritharan Thurairajaratnam ,  Farshad Ghahghahi

IPC: H01L23/34

CPC classification number: H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0254 ,  H05K1/0263 ,  H05K1/0366 ,  H05K1/115 ,  H05K3/4602 ,  H05K2201/029 ,  H05K2201/09536 ,  H05K2201/09609 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A substrate is provided, which has a pattern of voltage supply vias extending through at least a portion of the substrate. Each of a plurality of the voltage supply vias is surrounded by four of the voltage supply vias of a same polarity in four orthogonal directions and by four voltage supply vias of an opposite polarity in four diagonal directions.

Abstract translation: 提供了一种衬底，其具有延伸通过衬底的至少一部分的电压供给通孔的图案。 多个电压供给通路中的每一个由四个正交方向上的相同极性的四个电压供给通孔和四个对角线方向上具有相反极性的四个电压供给通路围绕。

公开(公告)号：US20060042828A1

公开(公告)日：2006-03-02

申请号：US11201104

申请日：2005-08-11

Applicant: Tsutomu Matsuo

Inventor： Tsutomu Matsuo

IPC: H05K7/06

CPC classification number: H05K1/116 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K1/0218 ,  H05K1/0298 ,  H05K1/18 ,  H05K3/429 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/09609 ,  H05K2201/10189 ,  H01L2924/00

Abstract: In a transmission circuit board, ground terminal portions (10) are disposed at every other two rows in both end columns. Each of signal circuit layers (20) includes at least a pair of adjacent signal connecting portions electrically connected to a pair of the wiring portions (21, 22) arranged in parallel in a row direction and the column direction different from those on an adjacent signal circuit layer. Each of the ground layers is electrically connected to at least one of the ground terminal portions (10) in the both end columns.

Abstract translation: 在传输电路板中，接地端子部分（10）在两个端部列中每隔两列设置。 每个信号电路层（20）至少包括一对相邻的信号连接部分，电连接到沿着行方向并联布置的一对布线部分（21,22），并且列方向与相邻信号上的列方向不同 电路层。 每个接地层电连接到两端列中的至少一个接地端子部分（10）。