公开(公告)号：US20030170921A1

公开(公告)日：2003-09-11

申请号：US10430753

申请日：2003-05-06

Inventor： Salman Akram

IPC: H01L021/58

CPC classification number: H01L21/6835 ,  B33Y30/00 ,  B33Y80/00 ,  G01R1/0483 ,  G01R31/2884 ,  G01R31/2891 ,  H01L24/10 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/10135 ,  H01L2224/11554 ,  H01L2224/14051 ,  H01L2224/14505 ,  H01L2224/16237 ,  H01L2224/17517 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/81801 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/351 ,  H05K3/303 ,  H05K3/325 ,  H05K2201/10568 ,  H05K2201/10734 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2224/83851 ,  H01L2924/00 ,  H01L2224/05599

Abstract: One or more of stabilizers are disposed on the surface of a semiconductor device or test substrate that includes bond pads or contact pads located at or proximate to a centerline thereof prior to bonding the semiconductor device face-down upon the test substrate. Upon assembly of the semiconductor device and test substrate, the stabilizers prevent the semiconductor device from tipping or tilting relative to the test substrate. The stabilizers may be preformed structures which are attached to a surface of a semiconductor device, test substrate, or both, or are fabricated on such a surface. Stereolithographic techniques may be used to fabricate the stabilizers. In addition, a machine vision system may be used in conjunction with the stereolithographic technique to recognize the position and orientation of a semiconductor device or test substrate on which the stabilizer is to be fabricated.

Abstract translation: 在将半导体器件正面朝下地放置在测试基板上之前，将一个或多个稳定器设置在半导体器件或测试基板的表面上，该表面包括位于其中心线处或其附近的接合焊盘或接触焊盘。 在组装半导体器件和测试衬底时，稳定器防止半导体器件相对于测试衬底倾斜或倾斜。 稳定剂可以是附着到半导体器件，测试衬底或两者的表面上的预制结构，或者制造在这样的表面上。 可以使用立体光刻技术来制造稳定剂。 此外，机器视觉系统可以与立体光刻技术结合使用，以识别要在其上制造稳定器的半导体器件或测试基板的位置和取向。

公开(公告)号：US20030111727A1

公开(公告)日：2003-06-19

申请号：US10157981

申请日：2002-05-31

Applicant: Mitsubishi Denki Kabushiki Kaisha

Inventor： Hitoshi Kurusu

IPC: H01L023/04

CPC classification number: H01L24/81 ,  H01L23/49811 ,  H01L23/544 ,  H01L29/0657 ,  H01L2223/54473 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/11334 ,  H01L2224/16 ,  H01L2224/16237 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/30105 ,  H05K1/111 ,  H05K3/303 ,  H05K3/3436 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/09745 ,  H05K2201/09781 ,  H05K2201/10568 ,  H05K2201/10674 ,  H05K2203/0455 ,  H05K2203/167 ,  Y02P70/611 ,  Y02P70/613

Abstract: The object of the present invention is to provide a semiconductor integrated circuit device and a printed wired board, which can self-align to each other in an exact and precise manner. The semiconductor integrated circuit device have a plurality of conductive bumps. The printed wired board have a plurality of conductive recessed members at positions corresponding to those of the conductive bumps. Each of the conductive bumps is fit into the corresponding conductive recessed member so that the printed wired board is aligned to the semiconductor integrated circuit device.

Abstract translation: 本发明的目的是提供一种可以精确和精确地彼此自对准的半导体集成电路器件和印刷线路板。 半导体集成电路器件具有多个导电凸块。 印刷布线板在对应于导电凸块的位置处具有多个导电凹槽构件。 每个导电凸块装配到相应的导电凹入部件中，使得印刷的布线板与半导体集成电路器件对准。

公开(公告)号：US06540963B2

公开(公告)日：2003-04-01

申请号：US09881228

申请日：2001-06-11

Applicant: Masahiro Sugiyama

Inventor： Masahiro Sugiyama

IPC: G01N2700

CPC classification number: H01R13/03 ,  G01N27/225 ,  H01R4/04 ,  H05K3/306 ,  H05K2201/10454 ,  H05K2201/10568 ,  H05K2201/10651 ,  H05K2201/2036

Abstract: A humidity sensor 10 with high assembling properties and environmental resistance comprises a detecting element 14 having electrodes 14a and 14b formed on a base, conducting wires 12 and 13 connected individually to the electrodes by means of resin conductors formed of an organic high-molecular resin having an electrically conductive material dispersed therein, and a holding member 11 of an organic high-molecular resin for holding the detecting element and the conducting wires. The holding member has a connecting aperture 11c through which junctions between the electrodes and the conducting wires are exposed.

公开(公告)号：US20030032217A1

公开(公告)日：2003-02-13

申请号：US10266464

申请日：2002-10-08

Inventor： Warren M. Farnworth ,  Alan G. Wood

IPC: H01L021/44

CPC classification number: H01L24/81 ,  B33Y10/00 ,  B33Y30/00 ,  B33Y80/00 ,  G03F7/70416 ,  H01L24/14 ,  H01L24/75 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/10135 ,  H01L2224/13099 ,  H01L2224/14 ,  H01L2224/75 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/351 ,  H05K1/0269 ,  H05K3/0023 ,  H05K3/303 ,  H05K2201/09909 ,  H05K2201/10568 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05599

Abstract: Spacers for use on a surface of a semiconductor device component may be fabricated from dielectric materials. For example, stereolithographic or other processes in which a plurality of layers are formed that are contiguous, at least partially superimposed relative to one another, and mutually adhered. These processes may include use of a machine vision system for recognition of the position and orientation of a semiconductor device component upon disposal or fabrication of one or more spacers thereon. One or more of the insulative spacers may be formed or disposed on the surface of a semiconductor device component prior to securing the semiconductor device component to a higher level component, such as carrier substrate. The spacers may define a minimum, substantially uniform distance between the semiconductor device components. The spacers may also prevent tilting or tipping of one of the semiconductor device components relative to the other.

Abstract translation: 在半导体器件部件的表面上使用的间隔物可以由介电材料制成。 例如，其中形成多个相邻的至少部分地叠置并相互粘附的多个层的立体光刻或其它工艺。 这些方法可以包括使用机器视觉系统来识别半导体器件部件在处理或制造其上的一个或多个间隔物时的位置和取向。 在将半导体器件组件固定到诸如载体衬底的较高级组件之前，可以在半导体器件部件的表面上形成或设置一个或多个绝缘衬垫。 间隔件可以限定半导体器件部件之间的最小的，基本均匀的距离。 间隔件还可以防止半导体器件部件之一相对于另一个的倾斜或倾翻。

公开(公告)号：US06518654B1

公开(公告)日：2003-02-11

申请号：US09834415

申请日：2001-04-13

Applicant: Todd O. Bolken ,  Cary J. Baerlocher ,  David J. Corisis ,  Chad A. Cobbley

Inventor： Todd O. Bolken ,  Cary J. Baerlocher ,  David J. Corisis ,  Chad A. Cobbley

IPC: H01L2302

CPC classification number: H01L21/561 ,  H01L21/565 ,  H01L23/3107 ,  H01L24/32 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/30107 ,  H05K3/303 ,  H05K3/305 ,  H05K3/3436 ,  H05K2201/10568 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A ball grid array assembly includes a package cover that encapsulates a die and a portion of a substrate to which the die is attached, including an edge of the substrate. Encapsulation of the substrate edge by the cover reduces penetration of moisture or other contaminants into the substrate. The cover includes a rib that extends to contact a circuit board to which the ball grid array assembly is connected. With such a rib, planarity between the circuit board and the substrate is maintained during soldering.

公开(公告)号：US06454157B2

公开(公告)日：2002-09-24

申请号：US09845631

申请日：2001-04-30

Applicant: Stanley W. Olson

Inventor： Stanley W. Olson

IPC: B23K120

CPC classification number: H01R12/57 ,  H01R12/721 ,  H01R12/725 ,  H01R13/518 ,  H05K3/3426 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/09036 ,  H05K2201/10189 ,  H05K2201/10424 ,  H05K2201/10568 ,  H05K2201/2036 ,  H05K2203/041 ,  Y02P70/613

Abstract: A connector for use with a circuit substrate having a plurality of elongated conductors. A solder ball is fused to the end of the conductors for connection of the connector to a circuit substrate. Method for attaching the solder ball to the end of the conductors using a solder paste with or without a preformed solder ball. The conductors are fitted into passages of an interface member. A tail end of each conductor terminates in a well in a surface of the interface member that facilitates the attachment of solder ball to the end of the conductors. The passages in the interface member hold the conductor tail ends in place while providing a clearance around the conductor to accommodate the effects of thermal expansion and contraction.

Abstract translation: 一种用于具有多个细长导体的电路基板的连接器。 焊球熔接到导体的端部，用于将连接器连接到电路基板。 使用具有或不具有预制焊球的焊膏将焊球附接到导体末端的方法。 导体装配到接口构件的通道中。 每个导体的尾端终止在界面构件的表面中的井中，这有助于将焊球附着到导体的端部。 接口构件中的通道将导体尾端保持在适当的位置，同时在导体周围提供间隙以适应热膨胀和收缩的影响。

公开(公告)号：US20020110957A1

公开(公告)日：2002-08-15

申请号：US10119461

申请日：2002-04-10

Inventor： Jerrold L. King ,  Leland R. Nevill

IPC: H01L021/48

CPC classification number: H05K3/303 ,  G01R31/2851 ,  G01R31/2884 ,  H05K2201/10568 ,  H05K2201/10689 ,  H05K2203/0195 ,  Y02P70/613

Abstract: An improved semiconductor chip package capable of independently aligning with testing equipment during the manufacturing phase of electrical testing. Independent alignment is realized by directly connecting the semiconductor chip package to the test alignment apparatus by fitting together two substantially conforming surfaces, one on the chip package and one on the alignment apparatus. The conforming surfaces are arranged so that only one matable position is achievable. The substantially conforming surfaces equate to three substantially conical indentations on the chip package and three substantially conical protrusions or protuberances of substantially conforming size and depth extending from the alignment apparatus. Once fitted, the three protrusions suspend the semiconductor chip in a substantially horizontal plane so that electrical test contacts, also substantially in a horizontal plane, may be easily contacted with the conductive leads extending generally horizontally and co-planar from the semiconductor chip.

Abstract translation: 改进的半导体芯片封装，能够在电气测试制造阶段与测试设备独立对齐。 通过将两个基本上一致的表面（一个在芯片封装上）和一个在对准装置上装配在一起，将半导体芯片封装直接连接到测试对准装置，实现独立对准。 配合表面被布置成仅可实现一个可配合的位置。 基本上一致的表面等同于芯片封装上的三个基本上圆锥形的凹口，以及从对准装置延伸的基本上一致的尺寸和深度的三个基本上圆锥形的突起或突起。 一旦安装，三个突起将半导体芯片悬挂在基本上水平的平面中，使得电测试接触（也基本上在水平面）可以容易地与从半导体芯片大致水平并共面延伸的导电引线接触。

公开(公告)号：US20020097565A1

公开(公告)日：2002-07-25

申请号：US10021552

申请日：2001-12-19

Inventor： Arto Hietala

IPC: H05K007/14 ,  H05K005/00

CPC classification number: H01R12/7005 ,  H05K3/366 ,  H05K7/1454 ,  H05K2201/10189 ,  H05K2201/10568 ,  H05K2203/167

Abstract: A connection between a printed circuit board of a radio apparatus unit and a printed circuit board of a radio apparatus housing, the connection being based on a guide member arranged on the radio apparatus unit's printed circuit board, the guide member being placed into a guide space on the radio apparatus housing to provide a good electrical coupling.

Abstract translation: 无线电设备单元的印刷电路板和无线电设备外壳的印刷电路板之间的连接，所述连接基于布置在无线电设备单元的印刷电路板上的引导构件，引导构件被放置在引导空间 在无线电设备外壳上提供良好的电耦合。

公开(公告)号：US20020006033A1

公开(公告)日：2002-01-17

申请号：US09354755

申请日：1999-07-29

Inventor： MAHESH K. CHENGALVA

IPC: H05K007/02 ,  H05K007/06

CPC classification number: H05K3/303 ,  H05K3/305 ,  H05K3/3442 ,  H05K2201/09909 ,  H05K2201/10568 ,  H05K2201/10636 ,  H05K2201/10727 ,  H05K2201/2036 ,  Y02P70/611 ,  Y02P70/613

Abstract: A method of improving the life expectancy of surface mount components is electronic assemblies wherein a distance between the printed circuit board and the surface mount component is held to a predetermined distance defined as the stand-off height. The relationship between the stand-off height and the life expectancy of the component is directly proportional. A larger stand-off height translates into a longer life expectancy. The stand-off height is limited only by manufacturing constraints, such as process limitations and cost concerns. The stand-off height is set to a predetermined dimension by way of a spacer positioned between the surface mount component and the printed circuit board.

Abstract translation: 提高表面安装部件的预期寿命的方法是电子组件，其中印刷电路板和表面安装部件之间的距离被保持为限定为间隔高度的预定距离。 分离高度与组分的预期寿命之间的关系是直接成正比的。 更大的间隔高度意味着更长的预期寿命。 对立高度仅受制造限制，例如过程限制和成本问题的限制。 通过位于表面安装部件和印刷电路板之间的间隔件将间隔高度设定为预定尺寸。

公开(公告)号：US06280246B1

公开(公告)日：2001-08-28

申请号：US09644692

申请日：2000-08-24

Applicant: Masahiro Sawayanagi

Inventor： Masahiro Sawayanagi

IPC: H01R1360

CPC classification number: H05K3/306 ,  H01R12/707 ,  H01R13/639 ,  H05K3/3447 ,  H05K2201/09781 ,  H05K2201/10189 ,  H05K2201/10568 ,  H05K2201/10598 ,  H05K2201/10878

Abstract: One ends 12a of terminals 12S, 12T projecting outward from a connector housing 11 are inserted through terminal through holes 22 formed in a board 20 and secured to the board 20 by soldering. Each of the tip ends of the terminal 12T closer to the one end 12a is formed with a hook 13 which is folded into inverted V-shape, the hook 13 is inserted through the terminal through hole 22 of the board 20, and the tip end 13a of the hook 13 is engaged with a face 20a of the board 20 around the terminal through hole 22.

Abstract translation: 从连接器壳体11向外突出的端子12S，12T的一端12a穿过形成在板20中的端子通孔22插入，并通过焊接固定到板20上。 靠近一端12a的端子12T的每个末端形成有折叠成倒V形的钩13，钩13穿过板20的端子通孔22插入，并且尖端 钩子13的13a与端子通孔22周围的板20的面20a接合。