公开(公告)号：US20160299014A1

公开(公告)日：2016-10-13

申请号：US14684711

申请日：2015-04-13

Applicant: INVENSENSE, INC.

Inventor： Xiang Li ,  Omid Oliaei ,  Julius Ming-Lin Tsai ,  Baris Cagdaser ,  Martin Lim

IPC: G01K11/24 ,  G01K13/02 ,  H04B11/00

CPC classification number: G01K11/24 ,  G01K13/02 ,  G01K2013/024 ,  G01N29/024 ,  G01N2291/011 ,  G01N2291/014 ,  G01N2291/02845 ,  G01N2291/02881 ,  H04B11/00

Abstract: Acoustic ambient temperature and humidity sensing based on determination of sound velocity is described, in addition to sensors, algorithms, devices, systems, and methods therefor. An exemplary embodiment employs sound velocity in the determination of ambient temperature and humidity. Provided implementations include determinations of sound velocity based on time of flight of a coded acoustic signal and/or based on resonance frequency of a Helmholtz resonator.

Abstract translation: 除了传感器，算法，设备，系统及其方法之外，还描述了基于声速测定的声学环境温度和湿度感测。 示例性实施例在确定环境温度和湿度时采用声速。 提供的实现包括基于编码声信号的飞行时间和/或基于亥姆霍兹共振器的谐振频率来确定声速。

公开(公告)号：US09452925B2

公开(公告)日：2016-09-27

申请号：US14832786

申请日：2015-08-21

Applicant: InvenSense, Inc.

Inventor： Cerina Zhang ,  Martin Lim ,  Jongwoo Shin ,  Joseph Seeger

IPC: H01L23/02 ,  H01L21/54 ,  B81C1/00 ,  B81B7/02

CPC classification number: B81C1/00301 ,  B81B7/007 ,  B81B7/02 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81C1/0023 ,  B81C1/00238 ,  B81C1/00246 ,  B81C1/00269 ,  B81C2201/0104 ,  B81C2201/0132 ,  B81C2203/0145 ,  B81C2203/019 ,  B81C2203/035 ,  B81C2203/0792

Abstract: Semiconductor manufacturing processes include providing a first substrate having a first passivation layer disposed above a patterned top-level metal layer, and further having a second passivation layer disposed over the first passivation layer; the second passivation layer has a top surface. The processes further include forming an opening in a first portion of the second passivation layer, and the opening exposes a portion of a surface of the first passivation layer. The processes further include patterning the second and first passivation layers to expose portions of the patterned top-level metal layer and bonding a second substrate and the first substrate to each other. The bonding occurs within a temperature range in which at least the exposed portion of the first passivation layer undergoes outgassing.

Abstract translation: 半导体制造工艺包括提供第一衬底，其具有设置在图案化顶层金属层上方的第一钝化层，并且还具有设置在第一钝化层上的第二钝化层; 第二钝化层具有顶表面。 所述方法还包括在第二钝化层的第一部分中形成开口，并且开口暴露第一钝化层的表面的一部分。 所述方法还包括图案化第二钝化层和第一钝化层以暴露图案化顶层金属层的部分并将第二衬底和第一衬底彼此结合。 接合发生在至少第一钝化层的暴露部分经历脱气的温度范围内。

公开(公告)号：US09428379B2

公开(公告)日：2016-08-30

申请号：US14174639

申请日：2014-02-06

Applicant: InvenSense, Inc.

Inventor： Erhan Polatkan Ata ,  Martin Lim ,  Xiang Li ,  Stephen Lloyd ,  Michael Julian Daneman

IPC: H01L29/82 ,  B81B7/00 ,  H04R19/00 ,  B81B3/00

CPC classification number: B81B7/0061 ,  B81B3/001 ,  B81B2201/0257 ,  B81B2203/053 ,  B81B2203/058 ,  B81B2207/012 ,  H04R19/005

Abstract: A MEMS device is disclosed. The MEMS device comprises a first plate with a first surface and a second surface; and an anchor attached to a first substrate. The MEMS device further includes a second plate with a third surface and a fourth surface attached to the first plate. A linkage connects the anchor to the first plate, wherein the first plate and second plate are displaced in the presence of an acoustic pressure differential between the first and second surfaces of the first plate. The first plate, second plate, linkage, and anchor are all contained in an enclosure formed by the first substrate and a second substrate, wherein one of the first and second substrates contains a through opening to expose the first surface of the first plate to the environment.

Abstract translation: 公开了MEMS器件。 MEMS器件包括具有第一表面和第二表面的第一板; 以及附接到第一基板的锚。 MEMS器件还包括具有附接到第一板的第三表面和第四表面的第二板。 连杆将锚固件连接到第一板，其中第一板和第二板在第一板的第一和第二表面之间存在声压差的情况下移位。 第一板，第二板，连杆和锚固件都包含在由第一基板和第二基板形成的外壳中，其中第一和第二基板中的一个包含通孔，以将第一板的第一表面暴露于 环境。

公开(公告)号：US20160165331A1

公开(公告)日：2016-06-09

申请号：US14558911

申请日：2014-12-03

Applicant: INVENSENSE, INC.

Inventor： Fang Liu ,  Martin Lim

IPC: H04R1/08

CPC classification number: H04R1/08 ,  H04R19/005 ,  H04R2201/003

Abstract: A micro electro-mechanical system (MEMS) device is provided. The MEMS device includes: a first substrate having a first surface and a second surface, and a port disposed through the first substrate, wherein the port is configured to receive acoustic waves and wherein the first surface is exposed to an environment outside the MEMS device; and a diaphragm coupled to and facing the second surface and configured to deflect in response to pressure differential at the diaphragm in response to the received acoustic waves. The MEMS device also includes a second substrate coupled to and facing the diaphragm, and including circuitry, wherein the second substrate includes a recess region forming an integrated back cavity in the MEMS device. The MEMS device also includes an electrical connection electrically coupling the first substrate and the second substrate and configured to transmit an electrical signal indicative of the deflection of the diaphragm.

Abstract translation: 提供了微机电系统（MEMS）装置。 MEMS器件包括：具有第一表面和第二表面的第一基底和通过第一基底设置的端口，其中端口被配置为接收声波，并且其中第一表面暴露于MEMS器件外部的环境; 以及耦合到第二表面并面对第二表面并且响应于接收的声波而被配置为响应于隔膜处的压力差而偏转的膜片。 MEMS器件还包括耦合到并面向隔膜的第二衬底，并且包括电路，其中第二衬底包括形成MEMS器件中的集成后腔的凹陷区域。 MEMS装置还包括电连接电连接第一基板和第二基板并被配置为传输指示隔膜的偏转的电信号。

公开(公告)号：US20160083247A1

公开(公告)日：2016-03-24

申请号：US14957562

申请日：2015-12-02

Applicant: Invensense, Inc.

Inventor： Michael Julian Daneman ,  Mei-Lin Chan ,  Martin Lim ,  Fariboz Assaderaghi ,  Erhan Polatkan Ata

IPC: B81C1/00

CPC classification number: B81C1/00246 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2207/012 ,  B81C1/00158 ,  B81C2201/112 ,  B81C2203/0118 ,  B81C2203/0742 ,  B81C2203/0792 ,  H01L2224/83805

Abstract: A method for fabricating a MEMS device includes depositing and patterning a first sacrificial layer onto a silicon substrate, the first sacrificial layer being partially removed leaving a first remaining oxide. Further, the method includes depositing a conductive structure layer onto the silicon substrate, the conductive structure layer making physical contact with at least a portion of the silicon substrate. Further, a second sacrificial layer is formed on top of the conductive structure layer. Patterning and etching of the silicon substrate is performed stopping at the second sacrificial layer. Additionally, the MEMS substrate is bonded to a CMOS wafer, the CMOS wafer having formed thereupon a metal layer. An electrical connection is formed between the MEMS substrate and the metal layer.

Abstract translation: 一种用于制造MEMS器件的方法包括将第一牺牲层沉积并图案化到硅衬底上，第一牺牲层被部分去除留下第一剩余氧化物。 此外，该方法包括在硅衬底上沉积导电结构层，导电结构层与硅衬底的至少一部分进行物理接触。 此外，在导电结构层的顶部上形成第二牺牲层。 在第二牺牲层停止硅衬底的图案化和蚀刻。 此外，MEMS衬底被结合到CMOS晶片，其上形成有金属层的CMOS晶片。 在MEMS衬底和金属层之间形成电连接。

公开(公告)号：US20140264645A1

公开(公告)日：2014-09-18

申请号：US13831470

申请日：2013-03-14

Applicant: INVENSENSE, INC.

Inventor： Michael Julian Daneman ,  Martin Lim ,  Li-Wen Hung ,  Stephen Lloyd

IPC: H01L27/12

CPC classification number: H01L27/1203 ,  B81B3/0056 ,  B81B2201/0221 ,  B81B2203/053

Abstract: A Micro-Electro-Mechanical Systems (MEMS) device includes a first substrate with a first surface and a second surface, the first substrate including a base layer, a moveable beam disposed on the base layer, at least one metal layer, and one or more standoffs disposed on the base layer such that one or more metal layers are situated on the top surface of the one or more standoffs. The MEMS device further includes a second substrate including one or more metal layers bonded to the one or more standoffs resulting in an electrical connection between at least a portion of the one or more metal layers of the second substrate and one or more of the at least one electrode on the bottom surface and the at least one electrode on the top surface.

Abstract translation: 微电子机械系统（MEMS）装置包括具有第一表面和第二表面的第一基底，第一基底包括基底层，设置在基底层上的可移动光束，至少一个金属层，以及一个或 更多的间隔设置在基底层上，使得一个或多个金属层位于一个或多个支座的顶表面上。 MEMS器件还包括第二衬底，第二衬底包括一个或多个结合到一个或多个支座的金属层，导致在第二衬底的一个或多个金属层的至少一部分与至少一个或多个之间的电连接 底表面上的一个电极和顶表面上的至少一个电极。

公开(公告)号：US08822252B2

公开(公告)日：2014-09-02

申请号：US14033366

申请日：2013-09-20

Applicant: InvenSense, Inc.

Inventor： Kegang Huang ,  Jongwoo Shin ,  Martin Lim ,  Michael Julian Daneman ,  Joseph Seeger

IPC: H01L21/00

CPC classification number: B81C1/00301 ,  B81B7/0064 ,  B81B2207/098 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/031

Abstract: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.

Abstract translation: 公开了一种在集成MEMS器件中制造电连接的方法。 该方法包括形成MEMS晶片。 形成MEMS晶片包括在第一半导体层中形成一个空腔，将第一半导体层与设置在第一半导体层和第二半导体层之间的电介质层结合到第二半导体层，并且通过第二半导体蚀刻至少一个通孔 层和介电层，并在第二半导体层上沉积导电材料并填充至少一个通孔。 形成MEMS晶片还包括图案化和蚀刻导电材料以形成一个间隔并在导电材料上沉积锗层，图案化和蚀刻锗层，以及图案化和蚀刻第二半导体层以限定一个MEMS结构。 该方法还包括将MEMS晶片接合到基底基板。

公开(公告)号：US20140239353A1

公开(公告)日：2014-08-28

申请号：US14084569

申请日：2013-11-19

Applicant: Invensense, Inc.

Inventor： Michael Julian Daneman ,  Mei-Lin Chan ,  Martin Lim ,  Fariboz Assaderaghi ,  Erhan Polatkan Ata

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00246 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2207/012 ,  B81C1/00158 ,  B81C2201/112 ,  B81C2203/0118 ,  B81C2203/0742 ,  B81C2203/0792 ,  H01L2224/83805

Abstract: A method for fabricating a MEMS device includes depositing and patterning a first sacrificial layer onto a silicon substrate, the first sacrificial layer being partially removed leaving a first remaining oxide. Further, the method includes depositing a conductive structure layer onto the silicon substrate, the conductive structure layer making physical contact with at least a portion of the silicon substrate. Further, a second sacrificial layer is formed on top of the conductive structure layer. Patterning and etching of the silicon substrate is performed stopping at the second sacrificial layer. Additionally, the MEMS substrate is bonded to a CMOS wafer, the CMOS wafer having formed thereupon a metal layer. An electrical connection is formed between the MEMS substrate and the metal layer.

Abstract translation: 一种用于制造MEMS器件的方法包括将第一牺牲层沉积并图案化到硅衬底上，第一牺牲层被部分去除留下第一剩余氧化物。 此外，该方法包括在硅衬底上沉积导电结构层，导电结构层与硅衬底的至少一部分进行物理接触。 此外，在导电结构层的顶部上形成第二牺牲层。 在第二牺牲层停止硅衬底的图案化和蚀刻。 此外，MEMS衬底被结合到CMOS晶片，其上形成有金属层的CMOS晶片。 在MEMS衬底和金属层之间形成电连接。

公开(公告)号：US08564076B1

公开(公告)日：2013-10-22

申请号：US13754462

申请日：2013-01-30

Applicant: InvenSense, Inc.

Inventor： Kegang Huang ,  Jongwoo Shin ,  Martin Lim ,  Michael J. Daneman ,  Joseph Seeger

IPC: H01L27/14

CPC classification number: B81C1/00301 ,  B81B7/0064 ,  B81B2207/098 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/031

Abstract: A MEMS device is disclosed. The MEMS device comprises a MEMS substrate. The MEMS substrate includes a first semiconductor layer connected to a second semiconductor layer with a dielectric layer in between. MEMS structures are formed from the second semiconductor layer and include a plurality of first conductive pads. The MEMS device further includes a base substrate which includes a plurality of second conductive pads thereon. The second conductive pads are connected to the first conductive pads. Finally, the MEMS device includes a conductive connector formed through the dielectric layer of the MEMS substrate to provide electrical coupling between the first semiconductor layer and the second semiconductor layer. The base substrate is electrically connected to the second semiconductor layer and the first semiconductor layer.

Abstract translation: 公开了MEMS器件。 MEMS器件包括MEMS衬底。 MEMS基板包括连接到第二半导体层的第一半导体层，其间具有介电层。 MEMS结构由第二半导体层形成并且包括多个第一导电焊盘。 MEMS器件还包括在其上包括多个第二导电焊盘的基底基板。 第二导电焊盘连接到第一导电焊盘。 最后，MEMS器件包括通过MEMS衬底的电介质层形成的导电连接器，以提供第一半导体层和第二半导体层之间的电耦合。 基底基板电连接到第二半导体层和第一半导体层。