公开(公告)号：US11069661B1

公开(公告)日：2021-07-20

申请号：US16909043

申请日：2020-06-23

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Wei-Jhen Chen ,  Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Yuan-Hung Hsu

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H01L23/31

Abstract: An electronic package is formed by arranging two encapsulating portions of different materials between a plurality of electronic components stacked to each other to adjust a stress distribution of the electronic package, so that the degree of warpage of the electronic package can be optimally controlled.

公开(公告)号：US10950520B2

公开(公告)日：2021-03-16

申请号：US16533716

申请日：2019-08-06

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kuo-Hua Yu ,  Wen-Shan Tsai ,  En-Li Lin ,  Kaun-I Cheng ,  Wei-Ping Wang

IPC: H01L23/367 ,  H01L23/00 ,  H01L21/48 ,  F28F13/18

Abstract: An electronic package is provided. A heat dissipator is bonded via a thermal interface layer to an electronic component disposed on a carrier. The heat dissipator has a concave-convex structure to increase a heat-dissipating area of the thermal interface layer. Therefore, the heat dissipator has a better heat-dissipating effect.

公开(公告)号：US10863626B1

公开(公告)日：2020-12-08

申请号：US16669872

申请日：2019-10-31

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Yuan-Hung Hsu

IPC: H05K3/30 ,  H05K1/18 ,  H05K3/46 ,  H05K1/02

Abstract: A carrier structure is provided. A spacer is formed in an insulation board body provided with a circuit layer, and is not electrically connected to the circuit layer. The spacer breaks the insulation board body, and a structural stress of the insulation board body will not be continuously concentrated on a hard material of the insulation board body, thereby preventing warpage from occurring to the insulation board body.

公开(公告)号：US20200343641A1

公开(公告)日：2020-10-29

申请号：US16928289

申请日：2020-07-14

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Han-Hung Chen ,  Chun-Yi Huang ,  Chang-Fu Lin ,  Rung-Jeng Lin ,  Kuo-Hua Yu

IPC: H01Q9/04 ,  H05K1/14 ,  H05K1/18 ,  H05K1/11 ,  H05K1/02 ,  H01Q1/22 ,  H05K3/36

Abstract: An electronic package and a method for fabricating the same are provided. A resist layer and a support are formed on a first substrate having a first antenna installation area. A second substrate having a second antenna installation area is laminated on the resist layer and the support. The resist layer is then removed. The support keeps the first substrate apart from the second substrate at a distance to ensure that the antenna transmission between the first antenna installation area and the second antenna installation area can function normally.

公开(公告)号：US10763237B2

公开(公告)日：2020-09-01

申请号：US16691477

申请日：2019-11-21

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Min Lo ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kuo-Hua Yu ,  Hsiang-Hua Huang

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/00

Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

公开(公告)号：US10062651B2

公开(公告)日：2018-08-28

申请号：US15063592

申请日：2016-03-08

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Fang-Yu Liang ,  Hung-Hsien Chang ,  Yi-Che Lai ,  Chang-Fu Lin

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/522 ,  H01L23/16 ,  H01L21/48 ,  H01L23/14 ,  H01L23/15 ,  H01L23/498

CPC classification number: H01L23/562 ,  H01L21/486 ,  H01L23/145 ,  H01L23/147 ,  H01L23/15 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16238 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/37001 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A packaging substrate is provided, which includes: a substrate body having a first region with a plurality of conductive pads and a second region adjacent to the first region, and a material layer formed on the second region to prevent the substrate body from warping. An electronic package having the packaging substrate is also provided.

公开(公告)号：US20180130774A1

公开(公告)日：2018-05-10

申请号：US15434824

申请日：2017-02-16

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chang-Fu Lin ,  Chin-Tsai Yao ,  Kuo-Hua Yu ,  Fu-Tang Huang

IPC: H01L25/065 ,  H01L23/31

Abstract: A package stack structure is provided, including a first substrate, a second substrate stacked on the first substrate, and an encapsulant formed between the first substrate and the second substrate. A through hole is formed to penetrate the second substrate and allow the encapsulant to be filled therein, thereby increasing the contact area and hence strengthening the bonding between the encapsulant and the second substrate.

公开(公告)号：US09900996B2

公开(公告)日：2018-02-20

申请号：US14453977

申请日：2014-08-07

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chang-Fu Lin ,  Chin-Tsai Yao ,  Ming-Chin Chuang ,  Ko-Cheng Liu ,  Fu-Tang Huang

IPC: H05K1/00 ,  H05K3/46 ,  H05K1/09 ,  H05K1/18 ,  H05K1/02 ,  H05K3/28

CPC classification number: H05K3/4644 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/181 ,  H05K1/02 ,  H05K1/0296 ,  H05K1/0298 ,  H05K1/181 ,  H05K3/284 ,  H05K2201/0191 ,  H05K2201/09736 ,  H05K2201/20 ,  H05K2203/0353 ,  H05K2203/0369 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A package substrate is provided, which includes a plurality of dielectric layers and a plurality of circuit layers alternately stacked with the dielectric layers. At least two of the circuit layers have a difference in thickness so as to prevent warpage of the substrate.

公开(公告)号：US20170207161A1

公开(公告)日：2017-07-20

申请号：US15352856

申请日：2016-11-16

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chang-Fu Lin ,  Chin-Tsai Yao ,  Chun-Tang Lin ,  Fu-Tang Huang

IPC: H01L23/498 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31

Abstract: Provided is a substrate structure including a substrate body, electrical contact pads and an insulating protection layer disposed on the substrate body, wherein the insulating protection layer has openings exposing the electrical contact pads, and at least one of the electrical contact pads has at least a concave portion filled with a filling material to prevent solder material from permeating along surfaces of the insulating protection layer and the electric contact pads, thereby eliminating the phenomenon of solder extrusion. Thus, bridging in the substrate structure can be eliminated even when the bump pitch between two adjacent electrical contact pads is small. As a result, short circuits can be prevented, and production yield can be increased.

公开(公告)号：US20170186702A1

公开(公告)日：2017-06-29

申请号：US15063592

申请日：2016-03-08

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Fang-Yu Liang ,  Hung-Hsien Chang ,  Yi-Che Lai ,  Chang-Fu Lin

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/522

CPC classification number: H01L23/562 ,  H01L21/486 ,  H01L23/145 ,  H01L23/147 ,  H01L23/15 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16238 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/37001 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A packaging substrate is provided, which includes: a substrate body having a first region with a plurality of conductive pads and a second region adjacent to the first region, and a material layer formed on the second region to prevent the substrate body from warping. An electronic package having the packaging substrate is also provided.