公开(公告)号：US09511991B2

公开(公告)日：2016-12-06

申请号：US14331285

申请日：2014-07-15

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

Inventor： Xavier Baillin ,  Bernard Diem ,  Jean-Philippe Polizzi ,  Andre Rouzaud

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0058 ,  B81B7/0038 ,  B81B7/0077 ,  B81B2201/0228 ,  B81B2207/096 ,  B81C1/00285 ,  B81C1/00301 ,  B81C1/00682 ,  B81C2201/053 ,  B81C2203/0136 ,  B81C2203/0163 ,  H01L2224/16145 ,  H01L2224/16225

Abstract: A microdevice encapsulation structure arranged in at least one cavity formed between a substrate and a cap rigidly attached to the substrate is provided, the cap including one layer of a first material, one face of which forms an inner wall of the cavity, and mechanical reinforcement portions rigidly attached at least to and partly covering said face, having gas absorption and/or adsorption properties, in which the Young's modulus of a second material of the mechanical reinforcement portions is higher than that of the first material, wherein each of said portions includes at least one first layer of the second material, and at least one second layer of a third metallic getter material such that the first layer of the second material is arranged between the layer of the first material and the second layer of the third material and/or is covered by the second layer of the third material.

Abstract translation: 提供了一种微型装置封装结构，其设置在形成在基板和刚性地附接到基板的盖之间的至少一个空腔中，所述盖包括一层第一材料，其一个面形成所述空腔的内壁，并且机械加强 至少部分地覆盖所述表面的部分，具有气体吸收和/或吸附性能，其中机械加强部分的第二材料的杨氏模量高于第一材料的杨氏模量，其中每个部分包括 第二材料的至少一个第一层和第三金属吸气剂材料的至少一个第二层，使得第二材料的第一层布置在第一材料的层和第三材料的第二层之间和/ 或被第三材料的第二层覆盖。

公开(公告)号：US20160340174A1

公开(公告)日：2016-11-24

申请号：US14806201

申请日：2015-07-22

Applicant: Honeywell International Inc.

Inventor： John R. Reinke ,  Grant H. Lodden

IPC: B81B7/00 ,  B81C1/00 ,  H02N1/00

CPC classification number: B81B7/0019 ,  B81B3/0081 ,  B81B7/0087 ,  B81B2201/0228 ,  B81B2201/025 ,  B81C1/0069 ,  H02N1/00

Abstract: A method for fabricating a thermally isolated microelectromechanical system (MEMS) structure is provided. The method includes processing a first wafer of a first material with a glass wafer to form a composite substrate including at least one sacrificial structure of the first material and glass; forming a MEMS device in a second material; forming at least one temperature sensing element on at least one of: the composite substrate; and the MEMS device; and etching away the at least one sacrificial structure of the first material in the composite substrate to form at least one thermally isolating glass flexure. The MEMS device is thermally isolated on a thermal isolation stage by the at least one thermally isolating glass flexure. The at least one temperature sensing element in on a respective at least one of: the thermal isolation stage; and the MEMS device.

Abstract translation: 提供了一种用于制造热隔离微机电系统（MEMS）结构的方法。 该方法包括用玻璃晶片处理第一材料的第一晶片以形成包括第一材料和玻璃的至少一个牺牲结构的复合衬底; 在第二材料中形成MEMS装置; 在所述复合衬底中的至少一个上形成至少一个温度感测元件; 和MEMS器件; 以及蚀刻所述复合衬底中的所述第一材料的所述至少一个牺牲结构以形成至少一个热隔离玻璃弯曲部。 MEMS器件通过至少一个热隔离玻璃弯曲件在热隔离台上热隔离。 所述至少一个温度感测元件位于以下各自中的至少一个中：热隔离级; 和MEMS器件。

公开(公告)号：US09227840B2

公开(公告)日：2016-01-05

申请号：US14487104

申请日：2014-09-16

Applicant: Industrial Technology Research Institute

Inventor： Chung-Yuan Su ,  Chin-Fu Kuo ,  Chih-Yuan Chen ,  Chao-Ta Huang

IPC: H01L43/06 ,  B81B7/00 ,  G01P15/00 ,  G01R33/00 ,  G01R33/028

CPC classification number: B81B7/008 ,  B81B2201/0228 ,  B81B2201/025 ,  B81B2203/0109 ,  G01P15/00 ,  G01P15/124 ,  G01P15/125 ,  G01P2015/0831 ,  G01P2015/0834 ,  G01R33/00 ,  G01R33/0286

Abstract: A micro-electro mechanical apparatus having a PN-junction is provided. The micro-electro mechanical apparatus includes a movable mass, a conductive layer, and an electrode. The movable mass includes a P-type semiconductor layer and an N-type semiconductor layer. The PN-junction is formed between the P-type semiconductor layer and the N-type semiconductor layer. The micro-electro mechanical apparatus is capable of eliminating abnormal voltage signal when an alternating current passes through the conductive layer. The micro-electro mechanical apparatus is adapted to measure acceleration and magnetic field. The micro-electro mechanical apparatus can be other types of micro-electro mechanical apparatus such as micro-electro mechanical scanning micro-mirror.

Abstract translation: 提供具有PN结的微机电装置。 微机电装置包括可移动质量块，导电层和电极。 可移动块包括P型半导体层和N型半导体层。 在P型半导体层和N型半导体层之间形成PN结。 微电子机械装置能够在交流电流通过导电层时消除异常电压信号。 微机电装置适用于测量加速度和磁场。 微电机械装置可以是其他类型的微电机械装置，例如微机电扫描微镜。

公开(公告)号：US20150183632A1

公开(公告)日：2015-07-02

申请号：US14487104

申请日：2014-09-16

Applicant: Industrial Technology Research Institute

Inventor： Chung-Yuan Su ,  Chin-Fu Kuo ,  Chih-Yuan Chen ,  Chao-Ta Huang

IPC: B81B3/00

CPC classification number: B81B7/008 ,  B81B2201/0228 ,  B81B2201/025 ,  B81B2203/0109 ,  G01P15/00 ,  G01P15/124 ,  G01P15/125 ,  G01P2015/0831 ,  G01P2015/0834 ,  G01R33/00 ,  G01R33/0286

Abstract: A micro-electro mechanical apparatus having a PN-junction is provided. The micro-electro mechanical apparatus includes a movable mass, a conductive layer, and an electrode. The movable mass includes a P-type semiconductor layer and an N-type semiconductor layer. The PN-junction is formed between the P-type semiconductor layer and the N-type semiconductor layer. The micro-electro mechanical apparatus is capable of eliminating abnormal voltage signal when an alternating current passes through the conductive layer. The micro-electro mechanical apparatus is adapted to measure acceleration and magnetic field. The micro-electro mechanical apparatus can be other types of micro-electro mechanical apparatus such as micro-electro mechanical scanning micro-mirror.

Abstract translation: 提供具有PN结的微机电装置。 微机电装置包括可移动质量块，导电层和电极。 可移动块包括P型半导体层和N型半导体层。 在P型半导体层和N型半导体层之间形成PN结。 微电子机械装置能够在交流电流通过导电层时消除异常电压信号。 微机电装置适用于测量加速度和磁场。 微电机械装置可以是其他类型的微电机械装置，例如微机电扫描微镜。

公开(公告)号：US20140268523A1

公开(公告)日：2014-09-18

申请号：US14207461

申请日：2014-03-12

Applicant: BISHNU PRASANNA GOGOI

Inventor： BISHNU PRASANNA GOGOI

IPC: H05K7/02

CPC classification number: B81B7/02 ,  B81B2201/0207 ,  B81B2201/0214 ,  B81B2201/0228 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0278 ,  B81B2207/012 ,  B81B2207/05 ,  B81B2207/09 ,  H01L27/14 ,  H01L27/16 ,  H01L27/22 ,  H01L41/1132 ,  H01L41/1138 ,  H01L2924/00 ,  H05K7/02

Abstract: A wearable device is provided having multiple sensors configured to detect and measure different parameters of interest. The wearable device includes at least one monolithic integrated multi-sensor (MIMS) device. The MIMS device comprises at least two sensors of different types formed on a common semiconductor substrate. For example, the MIMS device can comprise an indirect sensor and a direct sensor. The wearable device couples a first parameter to be measured directly to the direct sensor. Conversely, the wearable device can couple a second parameter to be measured to the indirect sensor indirectly. Other sensors can be added to the wearable device by stacking a sensor to the MIMS device or to another substrate coupled to the MIMS device. This supports integrating multiple sensors to reduce form factor, cost, complexity, simplify assembly, while increasing performance.

Abstract translation: 提供了一种穿戴式装置，其具有被配置成检测和测量感兴趣的不同参数的多个传感器。 可佩戴装置包括至少一个单片集成多传感器（MIMS）装置。 MIMS器件包括形成在公共半导体衬底上的至少两种不同类型的传感器。 例如，MIMS装置可以包括间接传感器和直接传感器。 可穿戴设备将待测量的第一参数直接耦合到直接传感器。 相反，可佩戴装置可间接地将待测量的第二参数耦合到间接传感器。 可以通过将传感器堆叠到MIMS装置或耦合到MIMS装置的另一基板上将其它传感器添加到可穿戴装置中。 这支持集成多个传感器，以减少外形，成本，复杂性，简化组装，同时提高性能。

公开(公告)号：US20050230708A1

公开(公告)日：2005-10-20

申请号：US11028370

申请日：2005-01-03

Applicant: Frank Reichenbach ,  Stefan Pinter ,  Frank Henning ,  Hans Artmann ,  Helmut Baumann ,  Franz Laemer ,  Michael Offenberg ,  Georg Bischopink

Inventor： Frank Reichenbach ,  Stefan Pinter ,  Frank Henning ,  Hans Artmann ,  Helmut Baumann ,  Franz Laemer ,  Michael Offenberg ,  Georg Bischopink

IPC: B81B3/00 ,  B81B7/00 ,  B81C1/00 ,  C30B1/00

CPC classification number: B81C1/00293 ,  B81B2201/0228 ,  B81B2207/095 ,  B81C2201/0115 ,  B81C2203/0136 ,  B81C2203/0145

Abstract: The invention relates to a sensor with at least one silicon-based micromechanical structure, which is integrated with a sensor chamber of a foundation wafer, and with at least one covering that covers the foundation wafer in the region of the sensor chamber, and to a method for producing a sensor. It is provided that in the sensor of the invention, the covering (13) comprises a first layer (32) (deposition layer) that is permeable to an etching medium and the reaction products, and a hermetically sealing second layer (34) (sealing layer) located above it, and that in the method of the invention, at least the sensor chamber (28) present in the foundation wafer (11) after the establishment of the structure (26) is filled with an oxide (30), in particular CVD oxide or porous oxide; the sensor chamber (28) is covered by a first layer (32) (deposition layer), in particular of polysilicon, that is transparent to an etching medium and the reaction products or is retroactively made transparent; the oxide (30) in the sensor chamber (28) is removed through the deposition layer (32) with the etching medium; and next, a second layer (34) (sealing layer), in particular of metal or an insulator, is applied to the deposition layer (32) and hermetically seals off the sensor chamber (28).

Abstract translation: 本发明涉及具有至少一个硅基微机械结构的传感器，其与基础晶片的传感器室结合，并且在传感器室的区域中具有覆盖基础晶片的至少一个覆盖物，以及至少一个 传感器的制造方法 设置在本发明的传感器中，覆盖物（13）包括可蚀刻介质和反应产物的第一层（沉积层）和密封的第二层（34）（密封 层），并且在本发明的方法中，在建立结构（26）之后，至少存在于基础晶片（11）中的传感器室（28）填充有氧化物（30），其中 特定的CVD氧化物或多孔氧化物; 传感器室（28）由对蚀刻介质和反应产物透明的或者具有回溯性的透明的第一层（32）（沉积层）（特别是多晶硅）覆盖; 传感器室（28）中的氧化物（30）通过蚀刻介质通过沉积层（32）去除; 接下来，将特别是金属或绝缘体的第二层（34）（密封层）施加到沉积层（32）并气密地密封传感器室（28）。

公开(公告)号：US06582985B2

公开(公告)日：2003-06-24

申请号：US09748488

申请日：2000-12-27

Applicant: Cleopatra Cabuz ,  Jeffrey Alan Ridley

Inventor： Cleopatra Cabuz ,  Jeffrey Alan Ridley

IPC: H01L2100

CPC classification number: B81C1/0015 ,  B81B2201/0228 ,  B81C2201/019 ,  H01L27/12 ,  H01L27/1203

Abstract: Methods for making thin silicon layers suspended over recesses in glass wafers. One method includes providing a thin silicon-on-insulator (SOI) wafer, and a glass wafer. The SOI wafer can include a silicon oxide layer disposed between a first undoped or substantially undoped silicon layer and a second silicon layer. Recesses can be formed in the glass wafer surface and electrodes may be formed on the glass wafer surface. The first silicon layer of the SOI wafer is then bonded to the glass wafer surface having the recesses, and the second silicon layer is subsequently removed using the silicon oxide layer as an etch stop. Next, the silicon oxide layer is removed. The first silicon layer can then be etched to form the desired structure. In another illustrative embodiment, the first silicon layer has a patterned metal layer thereon. The SOI wafer is bonded to the glass wafer, with the patterned metal layer positioned adjacent the recesses in the glass wafer. Then, the second silicon layer is removed using the silicon oxide layer as an etch stop, and the silicon oxide layer is subsequently removed. The first silicon layer is then etched using the patterned metal layer as an etch stop. The patterned metal layer is then removed.

公开(公告)号：US20020081821A1

公开(公告)日：2002-06-27

申请号：US09748488

申请日：2000-12-27

Inventor： Cleopatra Cabuz ,  Jeffrey Alan Ridley

IPC: H01L021/00 ,  H01L021/84 ,  H01L021/30 ,  H01L021/46

CPC classification number: B81C1/0015 ,  B81B2201/0228 ,  B81C2201/019 ,  H01L27/12 ,  H01L27/1203

Abstract: Methods for making thin silicon layers suspended over recesses in glass wafers. One method includes providing a thin silicon-on-insulator (SOI) wafer, and a glass wafer. The SOI wafer can include a silicon oxide layer disposed between a first undoped or substantially undoped silicon layer and a second silicon layer. Recesses can be formed in the glass wafer surface and electrodes may be formed on the glass wafer surface. The first silicon layer of the SOI wafer is then bonded to the glass wafer surface having the recesses, and the second silicon layer is subsequently removed using the silicon oxide layer as an etch stop. Next, the silicon oxide layer is removed. The first silicon layer can then be etched to form the desired structure. In another illustrative embodiment, the first silicon layer has a patterned metal layer thereon. The SOI wafer is bonded to the glass wafer, with the patterned metal layer positioned adjacent the recesses in the glass wafer. Then, the second silicon layer is removed using the silicon oxide layer as an etch stop, and the silicon oxide layer is subsequently removed. The first silicon layer is then etched using the patterned metal layer as an etch stop. The patterned metal layer is then removed.

Abstract translation: 使薄硅层悬浮在玻璃晶片中的凹槽上的方法。 一种方法包括提供薄的绝缘体上硅（SOI）晶片和玻璃晶片。 SOI晶片可以包括设置在第一未掺杂或基本未掺杂的硅层和第二硅层之间的氧化硅层。 可以在玻璃晶片表面中形成凹部，并且可以在玻璃晶片表面上形成电极。 然后将SOI晶片的第一硅层接合到具有凹陷的玻璃晶片表面，并且随后使用氧化硅层作为蚀刻停止来去除第二硅层。 接下来，去除氧化硅层。 然后可以蚀刻第一硅层以形成所需的结构。 在另一说明性实施例中，第一硅层在其上具有图案化的金属层。 SOI晶片结合到玻璃晶片，图案化的金属层位于玻璃晶片中的凹槽附近。 然后，使用氧化硅层作为蚀刻停止层去除第二硅层，随后除去氧化硅层。 然后使用图案化的金属层作为蚀刻停止来蚀刻第一硅层。 然后去除图案化的金属层。

公开(公告)号：US12000857B2

公开(公告)日：2024-06-04

申请号：US17677234

申请日：2022-02-22

Applicant: SEIKO EPSON CORPORATION

Inventor： Masayasu Sakuma

IPC: G01P15/08 ,  B81B7/00 ,  G01P1/02 ,  G01P3/00 ,  G01P15/18

CPC classification number: G01P15/08 ,  B81B7/007 ,  G01P1/023 ,  G01P3/00 ,  G01P15/0802 ,  G01P15/18 ,  B81B2201/0228 ,  B81B2207/012

Abstract: A sensor module includes: a substrate including a first terminal and a second terminal; a first conductive bonding member having a first melting point and a first Young's modulus; a lead bonded to the first terminal by the first conductive bonding member; a second conductive bonding member having a second melting point lower than the first melting point and a second Young's modulus higher than the first Young's modulus; and an inertial sensor bonded to the second terminal by the second conductive bonding member.

公开(公告)号：US20230406693A1

公开(公告)日：2023-12-21

申请号：US18242267

申请日：2023-09-05

Applicant: Nanusens SL

Inventor： Josep Montanyà Silvestre

IPC: B81B3/00 ,  B81C1/00 ,  B81B7/00

CPC classification number: B81B3/0021 ,  B81C1/00142 ,  B81C1/00325 ,  B81B7/0006 ,  B81B2201/0228 ,  B81B2203/0163 ,  B81B2207/07

Abstract: A MEMS device formed using the materials of the BEOL of a CMOS process where a post-processing of vHF and post backing was applied to form the MEMS device and where a total size of the MEMS device is between 50 um and 150 um. The MEMS device may be implemented as an inertial sensor among other applications.