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    Trilayered beam MEMS device and related methods
    54.
    发明授权
    Trilayered beam MEMS device and related methods 有权
    三层梁MEMS器件及相关方法

    公开(公告)号：US06746891B2

    公开(公告)日：2004-06-08

    申请号：US10290920

    申请日：2002-11-08

    Applicant: Shawn Jay Cunningham ,  Svetlana Tatic-Lucic

    Inventor： Shawn Jay Cunningham ,  Svetlana Tatic-Lucic

    IPC: H01L2100

    CPC classification number: B81B3/0024 ,  B81B3/0051 ,  B81B2201/014 ,  B81B2201/018 ,  B81B2203/0118 ,  B81B2203/04 ,  B81B2207/07 ,  B81C1/0015 ,  B81C2201/0107 ,  B81C2201/0108 ,  B81C2201/0109 ,  H01H1/04 ,  H01H1/504 ,  H01H59/0009 ,  H01H61/04 ,  H01H2001/0042 ,  H01H2001/0063 ,  H01H2001/0089 ,  H01H2059/0072 ,  H01H2061/006 ,  H01L23/3735 ,  H01L23/522 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/09701 ,  H02N1/006 ,  H02N10/00 ,  Y10T29/49222 ,  H01L2924/00

    Abstract: Trilayered Beam MEMS Device and Related Methods. According to one embodiment, a method for fabricating a trilayered beam is provided. The method can include depositing a sacrificial layer on a substrate and depositing a first conductive layer on the sacrificial layer. The method can also include forming a first conductive microstructure by removing a portion of the first conductive layer. Furthermore, the method can include depositing a structural layer on the first conductive microstructure, the sacrificial layer, and the substrate and forming a via through the structural layer to the first conductive microstructure. Still furthermore, the method can include the following: depositing a second conductive layer on the structural layer and in the via; forming a second conductive microstructure by removing a portion of the second conductive layer, wherein the second conductive microstructure electrically communicates with the first conductive microstructure through the via; and removing a sufficient amount of the sacrificial layer so as to separate the first conductive microstructure from the substrate, wherein the structural layer is supported by the substrate at a first end and is freely suspended above the substrate at an opposing second end.

    Abstract translation: 三层梁MEMS器件及相关方法。 根据一个实施例，提供一种制造三层梁的方法。 该方法可以包括在衬底上沉积牺牲层并在牺牲层上沉积第一导电层。 该方法还可以包括通过去除第一导电层的一部分来形成第一导电微结构。 此外，该方法可以包括在第一导电微结构，牺牲层和衬底上沉积结构层，并且通过结构层将通孔形成到第一导电微结构。 此外，该方法可以包括以下：在结构层和通孔中沉积第二导电层; 通过去除所述第二导电层的一部分来形成第二导电微结构，其中所述第二导电微结构通过所述通孔与所述第一导电微结构电连通; 以及去除足够量的牺牲层以便将第一导电微结构与衬底分开，其中结构层在第一端由衬底支撑并且在相对的第二端处自由地悬挂在衬底上方。

    Process for manufacture of micro electromechanical devices having high electrical isolation
    55.
    发明授权
    Process for manufacture of micro electromechanical devices having high electrical isolation 有权
    具有高电绝缘性的微机电装置的制造方法

    公开(公告)号：US06617657B1

    公开(公告)日：2003-09-09

    申请号：US09710326

    申请日：2000-11-09

    Applicant: Jun J. Yao ,  Robert J. Anderson

    Inventor： Jun J. Yao ,  Robert J. Anderson

    IPC: H01L2982

    CPC classification number: B81C1/00484 ,  B81B2203/0118 ,  B81C2201/0108 ,  B81C2201/014 ,  B81C2201/019

    Abstract: The present invention relates to a fabrication process relating to a fabrication process for manufacture of micro-electromechanical (MEM) devices such as cantilever supported beams. This fabrication process requires only two lithographic masking steps and offers moveable electromechanical devices with high electrical isolation. A preferred embodiment of the process uses electrically insulating glass substrate as the carrier substrate and single crystal silicon as the MEM component material. The process further includes deposition of an optional layer of insulating material such as silicon dioxide on top of a layer of doped silicon grown on a silicon substrate. The silicon dioxide is epoxy bonded to the glass substrate to create a silicon-silicon dioxide-epoxy-glass structure. The silicon is patterned using anisotropic plasma dry etching techniques. A second patterning then follows to pattern the silicon dioxide layer and an oxygen plasma etch is performed to undercut the epoxy film and to release the silicon MEM component. This two-mask process provides single crystal silicon MEMs with electrically isolated MEM component. Retaining silicon dioxide insulating material in selected areas mechanically supports the MEM component.

    Abstract translation: 本发明涉及涉及用于制造诸如悬臂支撑梁的微机电（MEM）装置的制造工艺的制造工艺。 该制造工艺仅需要两个光刻掩模步骤，并提供具有高电绝缘性的可移动机电装置。 该方法的优选实施方案使用电绝缘玻璃基材作为载体基材，将单晶硅用作MEM组分材料。 该方法还包括在硅衬底上生长的掺杂硅层上沉积绝缘材料如二氧化硅的任选层。 二氧化硅是环氧键合到玻璃基底上以产生硅 - 二氧化硅 - 环氧玻璃结构。 使用各向异性等离子体干蚀刻技术将硅图案化。 然后进行第二图案化以对二氧化硅层进行图案化，并且执行氧等离子体蚀刻以切割环氧树脂膜并释放硅MEM组分。 该双掩模工艺提供具有电隔离的MEM组分的单晶硅MEM。 在选定区域保持二氧化硅绝缘材料机械地支撑MEM部件。

    Micro-electro mechanical device made from mono-crystalline silicon and method of manufacture therefore
    59.
    发明授权
    Micro-electro mechanical device made from mono-crystalline silicon and method of manufacture therefore 失效
    由单晶硅制成的微机电装置及其制造方法

    公开(公告)号：US06538296B1

    公开(公告)日：2003-03-25

    申请号：US09461018

    申请日：1999-12-15

    Applicant: Chang-Feng Wan

    Inventor： Chang-Feng Wan

    IPC: H01L2982

    CPC classification number: B81C1/0019 ,  B81C2201/0108 ,  B81C2201/019

    Abstract: A micro-electro-mechanical device and method of manufacture therefore with a suspended structure formed from mono-crystalline silicon, bonded to a substrate wafer with an organic adhesive layer serving as support and spacer and the rest of the organic adhesive layer serving as a sacrificial layer, which is removed by a dry etch means. Said substrate wafer may contain integrated circuits for sensing and controlling the device.

    Abstract translation: 因此，微机电装置及其制造方法由具有由单晶硅形成的悬置结构的方式制成，其结合到具有有机粘合剂层作为支撑和间隔物的衬底晶片上，其余的有机粘合层用作牺牲 层，其通过干蚀刻装置除去。 所述衬底晶片可以包含用于感测和控制该器件的集成电路。

    Dendritic material sacrificial layer micro-scale gap formation method
    60.
    发明授权
    Dendritic material sacrificial layer micro-scale gap formation method 失效
    树枝状材料牺牲层微尺度间隙形成方法

    公开(公告)号：US06248668B1

    公开(公告)日：2001-06-19

    申请号：US09483153

    申请日：2000-01-14

    Applicant: David Beebe ,  Hyuk-Jeen Suh ,  Jeffrey S. Moore ,  Pamidighantam Bharathi

    Inventor： David Beebe ,  Hyuk-Jeen Suh ,  Jeffrey S. Moore ,  Pamidighantam Bharathi

    IPC: H01L21302

    CPC classification number: B81B3/0005 ,  B81C1/00936 ,  B81C2201/0108

    Abstract: A micro-scale gap fabrication process using a dry releasable dendritic material sacrificial layer. The fabrication process produces micro-scale gaps, such as those required between a suspended microstructure and an opposing surface in MEMS. The dendritic sacrificial layer is releasable by heating the dendritic material past its decomposition point after forming the microstructure. The sacrificial layer may be applied to a wafer, for example, by spin coating a solution including the dissolved dendritic material. The sacrificial layer, after being formed, may be patterned and prepared for accepting structural material for the microstructure. After a desired microstructure or microstructures are formed around the sacrificial layer, the layer is dry releasable by heating.

    Abstract translation: 使用干可剥离树枝状材料牺牲层的微尺度间隙制造工艺。 制造过程产生微尺度间隙，例如在MEMS中的悬浮微结构和相对表面之间所需的间隙。 树枝状牺牲层通过在形成微观结构之后通过加热树枝状材料经过其分解点来释放。 牺牲层可以施加到晶片上，例如通过旋涂包括溶解的树枝状材料的溶液。 形成后的牺牲层可以被图案化并制备用于接受微结构的结构材料。 在围绕牺牲层形成期望的微结构或微结构之后，通过加热可以释放该层。

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