公开(公告)号：US09173305B2

公开(公告)日：2015-10-27

申请号：US13509181

申请日：2010-12-01

Applicant: Charles Binninger ,  Ulrich Knauer ,  Helmut Zottl ,  Werner Ruile ,  Tomasz Jewula ,  Rudolf Nuessl

Inventor： Charles Binninger ,  Ulrich Knauer ,  Helmut Zottl ,  Werner Ruile ,  Tomasz Jewula ,  Rudolf Nuessl

IPC: H03H9/02 ,  H05K3/38 ,  H01L23/498 ,  H03H9/145 ,  H05K1/09 ,  H05K1/02 ,  H05K1/03 ,  H05K3/04

CPC classification number: H01L41/0477 ,  H01L23/49844 ,  H01L23/49866 ,  H01L41/0472 ,  H01L41/1873 ,  H01L41/29 ,  H01L2924/0002 ,  H03H9/02929 ,  H03H9/14538 ,  H05K1/0265 ,  H05K1/0306 ,  H05K1/09 ,  H05K3/048 ,  H05K3/388 ,  H05K2201/0338 ,  H01L2924/00

Abstract: A metallization can be used for components working with acoustic waves. The metallization includes a base having a bottom layer comprising titanium, and an upper layer comprising copper. A top layer of the metallization disposed on the base comprises aluminum.

Abstract translation: 金属化可以用于声波工作的部件。 金属化包括具有包含钛的底层的基底和包含铜的上层。 设置在基座上的金属化的顶层包括铝。

公开(公告)号：US09161444B2

公开(公告)日：2015-10-13

申请号：US14354600

申请日：2012-09-28

Applicant: KYOCERA Corporation

Inventor： Kiyotaka Nakamura ,  Yoshio Ohashi ,  Kunihide Shikata

IPC: H05K1/00 ,  H05K1/09 ,  H05K3/38 ,  H01L23/15 ,  C04B41/90 ,  C04B41/00 ,  C04B41/52 ,  H05K1/03 ,  H01L23/373 ,  C04B111/00

CPC classification number: H05K1/09 ,  C04B41/009 ,  C04B41/52 ,  C04B41/90 ,  C04B2111/00405 ,  C04B2111/00844 ,  H01L23/15 ,  H01L23/3731 ,  H01L23/3735 ,  H01L23/3736 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/245 ,  H05K3/38 ,  H05K2201/0269 ,  H05K2201/0338 ,  H05K2201/035 ,  H05K2203/1126 ,  C04B35/00 ,  C04B35/10 ,  C04B35/185 ,  C04B35/48 ,  C04B35/581 ,  C04B35/584 ,  C04B41/4539 ,  C04B41/4572 ,  C04B41/5022 ,  C04B41/5127 ,  C04B41/5116 ,  C04B41/522 ,  C04B41/5155 ,  H01L2924/00

Abstract: A circuit board is provided with a metal wiring layer 12 on at least one principal surface of a ceramic sintered body 11, wherein the above-described metal wiring layer includes a first region 12a which is in contact with the principal surface and which contains a glass component and a second region 12b which is located on the first region 12a and which does not contain a glass component, the thickness of the first region 12a is 35% or more and 70% or less of the thickness of the metal wiring layer 12, and the average grain size in the first region 12a is smaller than the average grain size in the second region 12b.

Abstract translation: 电路板在陶瓷烧结体11的至少一个主面上设置有金属布线层12，其中上述金属布线层包括与主表面接触且包含玻璃的第一区域12a 第一区域12a和第二区域12b位于第一区域12a上并且不包含玻璃成分，第一区域12a的厚度为金属布线层12的厚度的35％以上且70％以下， 并且第一区域12a中的平均晶粒尺寸小于第二区域12b中的平均晶粒尺寸。

公开(公告)号：US20150245479A1

公开(公告)日：2015-08-27

申请号：US14708016

申请日：2015-05-08

Applicant: FUJIFILM Corporation

Inventor： Yoshihisa USAMI ,  Hiroshi OHTA

IPC: H05K1/09 ,  H05K3/00 ,  H05K1/03 ,  H05K3/10

CPC classification number: H05K1/092 ,  H05K1/0346 ,  H05K3/0091 ,  H05K3/105 ,  H05K2201/0154 ,  H05K2201/0338 ,  H05K2203/013 ,  H05K2203/107 ,  H05K2203/1157 ,  Y10T428/24909

Abstract: The process for manufacturing a conductive film, said process being capable of achieving efficient progress of reduction of a metal oxide into a metal and yielding a conductive film which exhibits excellent adhesion to a substrate; and a printed wiring board. This process includes: a step for applying a dispersion which contains metal oxide particles to a substrate to form a precursor film which contains the particles; and a step for irradiating the precursor film with a continuous-wave laser beam while scanning the laser beam relatively, and thereby reducing the metal oxide in an irradiated area to form a metal-containing conductive film. In the process, the scanning speed is 1.0 m/s or more, the laser power of the continuous-wave laser beam is 6.0 W or more, and the irradiation time per point on the surface of the precursor film is 1.0 μs or more.

Abstract translation: 制造导电膜的方法，所述方法能够实现将金属氧化物还原成金属并产生对衬底具有优异粘附性的导电膜的有效进展; 和印刷线路板。 该方法包括：将含有金属氧化物颗粒的分散体施加到基材上以形成含有颗粒的前体膜的步骤; 以及在相对地扫描激光束的同时用连续波激光束照射前体膜的步骤，从而在照射区域中还原金属氧化物以形成含金属的导电膜。 在该过程中，扫描速度为1.0m / s以上，连续波激光的激光功率为6.0W以上，前体膜表面的每点的照射时间为1.0μs以上。

公开(公告)号：US20150221413A1

公开(公告)日：2015-08-06

申请号：US14685964

申请日：2015-04-14

Applicant: ALPS ELECTRIC CO., LTD.

Inventor： Yui ABE ,  Yoshihiro TAGUCHI ,  Mitsuo BITO ,  Yoshiyuki ASABE ,  Yasuyuki KITAMURA ,  Tomoyuki YAMAI ,  Koji OGUMA ,  Tomofumi OBA

IPC: H01B5/14 ,  C23C14/34 ,  H01L31/0224

CPC classification number: H01B5/14 ,  B82Y30/00 ,  B82Y40/00 ,  C23C14/34 ,  H01B1/02 ,  H01L31/0224 ,  H01L31/022466 ,  H01L31/1884 ,  H01L51/0021 ,  H01L51/102 ,  H01L51/442 ,  H01L51/5206 ,  H05K1/09 ,  H05K3/388 ,  H05K2201/0108 ,  H05K2201/0326 ,  H05K2201/0338 ,  H05K2201/10128 ,  Y02E10/50 ,  Y10T428/31663 ,  Y10T428/31678

Abstract: A conductor includes: a transparent conductive film which is formed on a transparent substrate and includes a silver nanowire; and a metal film of which at least a portion is formed to overlap the transparent conductive film, in which a portion in which the transparent conductive film and the metal film overlap each other includes a buffer film which has adhesion to each of the transparent conductive film and the metal film and does not impede conduction between the transparent conductive film and the metal film. Preferably, the buffer film is, for example, an ITO film, and at this time, an upper surface of the transparent conductive film is a reverse-sputtered surface.

Abstract translation: 导体包括：透明导电膜，其形成在透明基板上并且包括银纳米线; 和形成有透明导电膜和金属膜彼此重叠的部分的透明导电膜重叠的至少一部分的金属膜包括具有与透明导电膜各自粘合的缓冲膜 和金属膜，并且不妨碍透明导电膜和金属膜之间的导通。 优选地，缓冲膜是例如ITO膜，此时，透明导电膜的上表面是反溅射表面。

公开(公告)号：US20150195903A1

公开(公告)日：2015-07-09

申请号：US14570558

申请日：2014-12-15

Applicant: lllinois Tool Works Inc.

Inventor： Sundareshwaran Sadasivan ,  John J. Dick ,  Norbert Dieter Hell ,  Matthew D. Beavis ,  John H. Schneider

IPC: H05K1/02 ,  H05K3/00 ,  B32B37/24 ,  B32B27/06 ,  B32B37/00 ,  B32B38/10 ,  B32B15/08 ,  H05K1/09 ,  B32B37/12

CPC classification number: H05K1/0296 ,  B32B7/12 ,  B32B15/08 ,  B32B27/06 ,  B32B27/10 ,  B32B27/30 ,  B32B27/304 ,  B32B27/36 ,  B32B27/365 ,  B32B27/40 ,  B32B37/025 ,  B32B37/12 ,  B32B37/1292 ,  B32B37/24 ,  B32B38/10 ,  B32B2250/02 ,  B32B2255/10 ,  B32B2307/202 ,  B32B2307/41 ,  B32B2307/416 ,  B32B2311/00 ,  B32B2457/08 ,  B32B2457/208 ,  G06F3/039 ,  H05K1/09 ,  H05K3/00 ,  H05K3/025 ,  H05K3/386 ,  H05K2201/0338 ,  H05K2201/0355 ,  H05K2203/066 ,  Y10T156/10 ,  Y10T428/31678

Abstract: A foil assembly of a printed product includes a metallic layer and a polymer layer. The metallic layer forms conductive bodies that can be detected by a touch-sensitive device. The polymer layer is coupled with the metallic layer and includes a pigment that is reflective and/or opaque and a flexible binder material. The polymer layer absorbs changes in shape of an adhesive between the foil assembly and the printed product apparatus to prevent cracking. The foil assembly may include a tie coat layer that couples the metallic layer with the adhesive and/or another tie coat layer on the other side of the metallic layer which bonds to first side of a second metallic layer. The second side of the second metallic layer includes a tie coat that couples the complete assembly with the adhesive of the printed product apparatus.

Abstract translation: 印刷产品的箔组件包括金属层和聚合物层。 金属层形成可由触敏装置检测的导电体。 聚合物层与金属层耦合并且包括反射和/或不透明的颜料和柔性粘合剂材料。 聚合物层吸收箔组件和印刷产品装置之间的粘合剂的形状变化以防止开裂。 箔组件可以包括将金属层与粘合到第二金属层的第一侧的金属层的另一侧上的粘合剂和/或另一粘结涂层耦合的粘结涂层。 第二金属层的第二面包括将整个组件与印刷产品装置的粘合剂连接的连接涂层。

公开(公告)号：US20150173185A1

公开(公告)日：2015-06-18

申请号：US14635429

申请日：2015-03-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi Ito ,  Yoichi Moriya ,  Tetsuo Kanamori ,  Yukihiro Yagi ,  Yuki Yamamoto

IPC: H05K1/02 ,  H05K3/46 ,  H05K3/06 ,  H05K1/11

CPC classification number: H05K1/0298 ,  H05K1/115 ,  H05K3/06 ,  H05K3/38 ,  H05K3/4038 ,  H05K3/4661 ,  H05K2201/0338 ,  H05K2201/0355 ,  H05K2201/09563 ,  H05K2203/0369 ,  H05K2203/0554 ,  H05K2203/063 ,  H05K2203/1105 ,  H05K2203/1461

Abstract: A circuit board structure and a manufacturing method for a circuit board that ensures an electrical connection between a metal foil and a projection without using a conductive adhesive and is less likely to cause a decrease in the reliability of the connection due to the interlayer separation or the like is provided. A circuit board includes an insulating layer, a lower main surface wiring pattern and an upper main surface wiring pattern disposed on either side of the insulating layer, and an interlayer connection conductor passing through the insulating layer in a thickness direction and electrically connecting to the lower main surface wiring pattern and the upper main surface wiring pattern. The interlayer connection conductor is formed integrally with the lower main surface wiring pattern, and is bonded to the upper main surface wiring pattern via an intermetallic compound.

Abstract translation: 一种用于电路板的电路板结构和制造方法，其确保金属箔和突起之间的电连接而不使用导电粘合剂，并且不太可能导致由于层间隔离引起的连接的可靠性降低 喜欢被提供。 电路板包括绝缘层，下主表面布线图案和布置在绝缘层两侧的上主表面布线图案，以及层间连接导体，其沿​​厚度方向穿过绝缘层并电连接到下层 主表面布线图案和上表面布线图案。 层间连接导体与下主表面布线图形一体地形成，并且通过金属间化合物结合到上主表面布线图案。

公开(公告)号：US20150144382A1

公开(公告)日：2015-05-28

申请号：US14087341

申请日：2013-11-22

Applicant: International Business Machines Corporation

Inventor： Jinwoo Choi ,  Daniel M. Dreps ,  Rohan U. Mandrekar

IPC: H05K1/02 ,  H05K3/46 ,  H05K3/00 ,  H05K3/12 ,  H05K1/03 ,  H05K1/09

CPC classification number: H05K1/0298 ,  B32B18/00 ,  C04B37/006 ,  C04B2237/34 ,  C04B2237/343 ,  C04B2237/366 ,  C04B2237/68 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4867 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L2924/0002 ,  H05K1/0245 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/005 ,  H05K3/1216 ,  H05K3/1233 ,  H05K3/1291 ,  H05K3/245 ,  H05K3/4667 ,  H05K2201/0338 ,  H05K2201/035 ,  H05K2201/09272 ,  H05K2201/09709 ,  H05K2203/0126 ,  H05K2203/063 ,  Y10T156/10 ,  H01L2924/00

Abstract: The embodiments of the present invention relate generally to the fabrication of integrated circuits, and more particularly to a structure and method for fabricating differential wiring patterns in multilayer glass-ceramic (MLC) modules. A structure and method of forming a MLC having layers with staggered, or offset, pairs of lines formed directly on one another are disclosed. In addition, a structure and method of forming a MLC having layers with staggered, or offset, pairs of lines that periodically reverse polarity are disclosed.

Abstract translation: 本发明的实施例一般涉及集成电路的制造，更具体地涉及用于在多层玻璃 - 陶瓷（MLC）模块中制造差分布线图案的结构和方法。 公开了一种形成具有彼此直接形成的交错或偏移成对的层的MLC的结构和方法。 另外，公开了一种形成具有周期性反转极性的具有交错或偏移的线对的层的MLC的结构和方法。

公开(公告)号：US09006912B2

公开(公告)日：2015-04-14

申请号：US13544809

申请日：2012-07-09

Applicant: Chih-Chin Liao ,  Han-Shiao Chen ,  Chin-Tien Chiu ,  Ken Jian Ming Wang ,  Cheemen Yu ,  Hem Takiar

Inventor： Chih-Chin Liao ,  Han-Shiao Chen ,  Chin-Tien Chiu ,  Ken Jian Ming Wang ,  Cheemen Yu ,  Hem Takiar

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H05K1/11 ,  H05K3/42

CPC classification number: H05K1/111 ,  H01L2924/0002 ,  H05K1/0298 ,  H05K1/115 ,  H05K1/181 ,  H05K3/4038 ,  H05K3/429 ,  H05K2201/0195 ,  H05K2201/0338 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/10159 ,  H05K2201/10689 ,  Y02P70/611 ,  H01L2924/00

Abstract: A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.

Abstract translation: 公开了具有共同的电连接器和接触焊盘区域的印刷电路板。 迹线和/或通孔所在接触焊盘区域可被蚀刻掉，以确保迹线，通孔和接触焊盘之间的电气隔离。

公开(公告)号：US20150090478A1

公开(公告)日：2015-04-02

申请号：US14502745

申请日：2014-09-30

Applicant: Joseph Ambrose Wolf ,  Kenneth A. Peterson

Inventor： Joseph Ambrose Wolf ,  Kenneth A. Peterson

IPC: H05K1/03 ,  H05K1/02 ,  H05K1/09 ,  H05K1/11

CPC classification number: H05K1/115 ,  H05K3/4629 ,  H05K2201/0338

Abstract: A ceramic substrate comprises a plurality of ceramic sheets, a plurality of inner conductive layers, a plurality of vias, and an upper conductive layer. The ceramic sheets are stacked one on top of another and include a top ceramic sheet. The inner conductive layers include electrically conductive material that forms electrically conductive features on an upper surface of each ceramic sheet excluding the top ceramic sheet. The vias are formed in each of the ceramic sheets with each via being filled with electrically conductive material. The upper conductive layer includes electrically conductive material that forms electrically conductive features on an upper surface of the top ceramic sheet. The upper conductive layer is constructed from a stack of four sublayers. A first sublayer is formed from titanium. A second sublayer is formed from copper. A third sublayer is formed from platinum. A fourth sublayer is formed from gold.

Abstract translation: 陶瓷基板包括多个陶瓷片，多个内导电层，多个通孔和上导电层。 陶瓷片层叠在一起，并且包括顶部陶瓷片。 内部导电层包括导电性材料，其在除了顶部陶瓷片之外的每个陶瓷片的上表面上形成导电特征。 在每个陶瓷片中形成通孔，每个通孔填充有导电材料。 上导电层包括在顶部陶瓷片的上表面上形成导电特征的导电材料。 上导电层由四个子层的堆叠构成。 第一子层由钛形成。 第二子层由铜形成。 第三子层由铂形成。 第四子层由金形成。

公开(公告)号：US08980414B2

公开(公告)日：2015-03-17

申请号：US13823349

申请日：2012-08-30

Applicant: Tomota Nagaura ,  Kazuhiko Sakaguchi

Inventor： Tomota Nagaura ,  Kazuhiko Sakaguchi

IPC: B32B15/00 ,  B32B15/20 ,  H05K1/09 ,  B32B15/01 ,  C25D1/04 ,  C25D3/04 ,  C25D3/12 ,  C25D3/38 ,  C25D3/58 ,  C25D5/14 ,  C25D7/06 ,  C25D9/08 ,  C23C28/02

CPC classification number: H05K1/09 ,  B32B15/01 ,  C23C18/165 ,  C23C18/31 ,  C23C28/023 ,  C25D1/04 ,  C25D3/04 ,  C25D3/12 ,  C25D3/14 ,  C25D3/16 ,  C25D3/38 ,  C25D3/562 ,  C25D3/565 ,  C25D3/58 ,  C25D5/14 ,  C25D7/0614 ,  C25D9/08 ,  C25D11/38 ,  H05K3/025 ,  H05K2201/0317 ,  H05K2201/032 ,  H05K2201/0338 ,  H05K2201/0355 ,  H05K2203/0307 ,  Y10T428/12438 ,  Y10T428/12493 ,  Y10T428/12514 ,  Y10T428/12611 ,  Y10T428/12667 ,  Y10T428/12861 ,  Y10T428/12882 ,  Y10T428/1291 ,  Y10T428/12931 ,  Y10T428/12944 ,  Y10T428/12958 ,  Y10T428/24917

Abstract: The present invention provides a carrier-attached copper foil, wherein an ultrathin copper foil is not peeled from the carrier prior to the lamination to an insulating substrate, but can be peeled from the carrier after the lamination to the insulating substrate. A carrier-attached copper foil comprising a copper foil carrier, an intermediate layer laminated on the copper foil carrier, and an ultrathin copper layer laminated on the intermediate layer, wherein the intermediate foil is configured with a Ni layer in contact with an interface of the copper foil carrier and a Cr layer in contact with an interface of the ultrathin copper layer, said Ni layer containing 1,000-40,000 μg/dm2 of Ni and said Cr layer containing 10-100 μg/dm2 of Cr is provided.

Abstract translation: 本发明提供一种载体附着铜箔，其中在层压到绝缘基板之前，超薄铜箔不从载体剥离，而是可以在与绝缘基板层合之后从载体上剥离。 一种载体附着铜箔，包括铜箔载体，层压在所述铜箔载体上的中间层和层压在所述中间层上的超薄铜层，其中所述中间箔配置有与所述中间层的界面接触的Ni层 铜箔载体和与超薄铜层的界面接触的Cr层，所述Ni层含有1000-40,000μg/ dm 2的Ni，所述Cr层含有10-100μg/ dm 2的Cr。