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公开(公告)号:US10469166B2
公开(公告)日:2019-11-05
申请号:US15652982
申请日:2017-07-18
Applicant: Maxlinear, Inc.
Inventor: Curtis Ling
IPC: H04B10/25 , H04B10/079 , H04J14/02 , H04B10/2575 , H04B10/50 , H04L12/24 , H04B10/00 , H04J14/00 , G02B6/26 , G02B6/28 , H04L12/66
Abstract: Circuitry of a fiber node which is configured to couple to an optical link and an electrical link may comprise an electrical-to-optical conversion circuit for transmitting on the optical link. The circuitry may be operable to receive signals via the optical link. The circuitry may select between or among different configurations of the electrical-to-optical conversion circuit based on the signals received via the optical link. The signals received via the optical link may be intended for one or more gateways served by the fiber node or may be dedicated signals intended for configuration of the circuitry. The circuitry may be operable to generate feedback and insert the feedback into a datastream received from one or more gateways via the electrical link prior to transmitting the datastream onto the optical link.
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公开(公告)号:US20190305999A1
公开(公告)日:2019-10-03
申请号:US16372587
申请日:2019-04-02
Applicant: Maxlinear, Inc.
Inventor: Curtis Ling
Abstract: A transmitter of a radar system repeatedly transmits a first OFDM symbol into a scene to be characterized during a first time interval, and repeatedly transmits, during a second time interval that occurs after the first time interval, a second OFDM symbol into the scene. A receiver of the radar system generates a first channel response estimate for a first section of the scene based on: received reflections of the first symbol, at least one of which was received during transmission of the second OFDM symbol in the second time interval, and a first channel response estimate for a second section of the scene based on the first channel response estimate for the first section of the scene, received reflections of the first symbol, and received reflections of the second symbol. The receiver detects objects present in the scene based on the first channel response estimate for the first section of the scene and the first channel response estimate for the second section of the scene.
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公开(公告)号:US10412598B2
公开(公告)日:2019-09-10
申请号:US15480192
申请日:2017-04-05
Applicant: MaxLinear, Inc.
Inventor: Curtis Ling
IPC: H04W16/28 , H04L1/00 , H01Q3/40 , H04B1/40 , H04W88/08 , H01Q25/00 , H04B1/10 , H04B7/10 , H04W64/00
Abstract: A first microwave backhaul transceiver may comprise a reflector and a signal processing subassembly. The signal processing subassembly may comprise a plurality of antenna elements positioned at a focal plane of the reflector. The signal processing subassembly may process a plurality of microwave signals corresponding to the plurality of antenna elements using a corresponding plurality of phase coefficients and a corresponding plurality of amplitude coefficients. The signal processing subassembly may adjust a radiation pattern of the plurality of antenna elements during operation of the signal processing subassembly through adjustment of the phase coefficients and/or the amplitude coefficients.
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公开(公告)号:US20190273524A1
公开(公告)日:2019-09-05
申请号:US15912225
申请日:2018-03-05
Applicant: MaxLinear, Inc.
Inventor: Roman Rainov , Eran Ridel , Ran Soffer , Uri Kanari , Nati Mizrahi , Kobi Sturkovich , Moche Cohen
Abstract: Systems and methods are provided for utilizing ultra-efficiency low noise configurations for phased array antennas. Radio frequency integrated circuits (RFICs) may be used in phased array antennas to enable configuring large number of phase shifters in highly efficient manner, and to do so in optimal manner, such as with low noise.
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公开(公告)号:US10404304B2
公开(公告)日:2019-09-03
申请号:US16110571
申请日:2018-08-23
Applicant: Maxlinear, Inc.
Inventor: Raja Pullela , Sheng Ye , Morten Damgaard
IPC: H04B1/18
Abstract: Methods and systems for a baseband cross-bar may comprise receiving one or more radio frequency (RF) signals in a wireless communication device via antennas coupled to a plurality of receiver paths in the wireless device. The received RF signals may be converted to baseband frequencies. One or more of the down-converted signals may be coupled to receiver paths utilizing a baseband cross-bar. The baseband cross-bar may comprise a plurality of switches, which may comprise CMOS transistors. In-phase and quadrature signals may be processed in the one or more of the plurality of receiver paths. The one or more RF signals comprise cellular signals and/or global navigation satellite signals. A single-ended received RF signal may be converted to a differential signal in one or more of the plurality of receiver paths. The baseband cross-bar may be controlled utilizing a reduced instruction set computing (RISC) processor.
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公开(公告)号:US10404260B2
公开(公告)日:2019-09-03
申请号:US15906578
申请日:2018-02-27
Applicant: Maxlinear, Inc.
Inventor: Sangeetha Gopalakrishnan , Sheng Ye , Vamsi Paidi , Raghava Manas Bachu
Abstract: Methods and systems for a sampled loop filter in a phase locked loop (PLL) may comprise a phase locked loop (PLL) comprising a phase frequency detector, a sampled loop filter comprising a plurality of capacitors and at least one switch, a plurality of voltage controlled oscillators (VCOs) coupled to said sampled loop filter, and a frequency divider. The PLL generates at least one clock signal, and the sampled loop filter samples an output signal from the phase frequency detector when an average of charge provided to a first of the plurality of capacitors in the sampled loop filter is zero. The frequency divider may be a fractional-N divider. A second switch in said sampled loop filter may have switching times that are non-overlapping with switching times of the at least one switch. Capacitors may be coupled to ground from each terminal of the second switch.
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公开(公告)号:US10389404B2
公开(公告)日:2019-08-20
申请号:US15919700
申请日:2018-03-13
Applicant: MAXLINEAR, INC.
Inventor: Stephane Laurent-Michel , Raghuraman Mariappan
Abstract: Aspects of methods and systems for PAPR reduction in a microwave backhaul outdoor unit are provided.
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公开(公告)号:US10374879B2
公开(公告)日:2019-08-06
申请号:US15805776
申请日:2017-11-07
Applicant: MaxLinear, Inc.
Inventor: Yoav Hebron , Na Chen , Ronald Lee
Abstract: Systems and methods for efficiently establishing beacon transmission power, for example in networks in which beacon transmission responsibility can be passed between nodes. As a non-limiting example, various aspects of the present disclosure provide systems and methods for establishing beacon transmission power in a node that has received beacon transmission responsibility in a network, for example by hand-off, failover, etc.
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公开(公告)号:US10355686B2
公开(公告)日:2019-07-16
申请号:US16057499
申请日:2018-08-07
Applicant: Maxlinear, Inc.
Inventor: Yongjian Tang , Xuefeng Chen
IPC: H03K17/06 , H03K17/687
Abstract: Methods and systems for reliable bootstrapping switches may comprise sampling a received signal with a bootstrapping switch, where the bootstrapping switch comprises a switching metal-oxide semiconductor (MOS) transistor having a pull-down path coupled to a gate terminal of the switching MOS transistor, wherein: source terminals of both a diode-connected transistor and a second MOS transistor are coupled to the gate terminal of the switching MOS transistor; drain terminals of both the diode-connected transistor and the second MOS transistor are coupled to a source terminal of a third MOS transistor, the third MOS transistor coupled in series with a fourth MOS transistor; and a drain terminal of the fourth MOS transistor is coupled to ground. The third and fourth MOS transistors may be in series with the second MOS transistor. A gate terminal of the fourth transistor may be switched from ground to a supply voltage to activate the pull-down path.
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公开(公告)号:US10319418B2
公开(公告)日:2019-06-11
申请号:US15918395
申请日:2018-03-12
Applicant: MaxLinear, Inc.
Inventor: Jian-Hung Lin
Abstract: Systems and methods are provided for enhanced parallel bit-interleaving. The parallel bit-interleaving may include, in each of a plurality of cycles, reading a number of bits from an input bitstream; processing the read bits, with the processing including applying a first adjustment to a first combination of bits that includes the read bits and additional bits, wherein each of the additional bits includes a previously read bit in the input bitstream or a pre-set bit; when one or more conditional criteria are met, applying a second adjustment to a second combination of bits that includes bits corresponding to previously read bits, wherein the conditional criteria include completing processing of a full column; writing into memory a number of bits corresponding to the first combination of bits and/or the second combination of bits; and reading from the memory a number of bits, for generating an output corresponding to the particular cycle.
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