公开(公告)号：US20230111561A1

公开(公告)日：2023-04-13

申请号：US18080658

申请日：2022-12-13

Applicant: Imagination Technologies Limited

Inventor： Xile Yang ,  Robert Brigg ,  Michael John Livesley

IPC: G06T15/00 ,  G06T1/20 ,  G06T1/60

Abstract: Data structures, methods and tiling engines for storing tiling data in memory wherein the tiles are grouped into tile groups and the primitives are grouped into primitive blocks. The methods include, for each tile group: determining, for each tile in the tile group, which primitives of each primitive block intersect that tile; storing in memory a variable length control data block for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group; and storing in memory a control stream comprising a fixed sized primitive block entry for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group, each primitive block entry identifying a location in memory of the control data block for the corresponding primitive block. Each primitive block entry may comprise valid tile information identifying which tiles of the tile group are valid for the corresponding primitive block. A tile is a valid tile for a primitive block if at least one primitive in the primitive block intersects that tile.

公开(公告)号：US11610358B2

公开(公告)日：2023-03-21

申请号：US17169417

申请日：2021-02-06

Applicant: Imagination Technologies Limited

Inventor： Diego Jesus ,  John W. Howson ,  Panagiotis Velentzas ,  Robert Brigg ,  Xile Yang

IPC: G06T15/00 ,  G06T1/20 ,  G06T1/60 ,  G06T11/40 ,  G06T9/00 ,  G06T11/20 ,  G06T15/04 ,  G06T17/10

Abstract: Methods and tiling engines for tiling primitives in a tile based graphics processing system in which a rendering space is divided into a plurality of tiles. The method includes generating a multi-level hierarchy of tile groups, each level of the multi-level hierarchy comprising one or more tile groups comprising one or more of the plurality of tiles; receiving a plurality of primitive blocks, each primitive block comprising geometry data for one or more primitives; associating each of the plurality of primitive blocks with one or more of the tile groups up to a maximum number of tile groups such that if at least one primitive of a primitive block falls, at least partially, within the bounds of a tile, the primitive block is associated with at least one tile group that includes that tile; and generating a control stream for each tile group based on the associations, wherein each control stream comprises a primitive block entry for each primitive block associated with the corresponding tile group.

公开(公告)号：US11527039B2

公开(公告)日：2022-12-13

申请号：US17536671

申请日：2021-11-29

Applicant: Imagination Technologies Limited

Inventor： Xile Yang ,  Robert Brigg ,  John W. Howson

IPC: G06T15/40 ,  G06T15/00 ,  G06T1/60

Abstract: Methods and primitive block generators for generating primitive blocks in a graphics processing system. The methods comprise: receiving transformed position data for a current primitive, the transformed position data indicating a position of the current primitive in rendering space; determining a distance between the position of the current primitive and a position of a current primitive block based on the transformed position data for the current primitive; determining whether to add the current primitive to the current primitive block based on the distance and a fullness of the current primitive block; in response to determining that the current primitive is to be added to the current primitive block, adding the current primitive to the current primitive block; and in response to determining that the current primitive is not to be added to the current primitive block, flushing the current primitive block and adding the current primitive to a new current primitive block.

公开(公告)号：US20220028030A1

公开(公告)日：2022-01-27

申请号：US17498699

申请日：2021-10-11

Applicant: Imagination Technologies Limited

Inventor： Robert Brigg ,  John Howson ,  Xile Yang

IPC: G06T1/60 ,  G06F9/30 ,  G06T1/20 ,  G06T17/10 ,  G06T15/00

Abstract: A graphics processing system for generating a rendering output includes geometry processing logic and rasterization logic. The geometry processing logic includes first transformation logic configured to transform a plurality of untransformed primitives into a plurality of transformed primitives, the first transformation logic configured to implement one or more expansion transformation stages which generate one or more sub-primitives; a primitive block generator configured to: divide the plurality of transformed primitives into a plurality of groups; and generate an untransformed primitive block for each group comprising (i) information identifying the untransformed primitives related to the transformed primitives in the group; and (ii) an expansion transformation stage mask for at least one of the one or more expansion transformation stages that indicates the sub-primitives generated for the untransformed primitives in that untransformed primitive block that are to be used in generating the rendering output. The rasterization logic comprising: second transformation logic configured to re-transform the plurality of untransformed primitives into the plurality of transformed primitives on an untransformed primitive block-basis in accordance with the expansion transformation stage mask for the at least one of the one or more expansion transformation stages; and logic configured to render the transformed primitives to generate the rendering output.

公开(公告)号：US11217007B2

公开(公告)日：2022-01-04

申请号：US16724239

申请日：2019-12-21

Applicant: Imagination Technologies Limited

Inventor： Xile Yang ,  Robert Brigg ,  John W. Howson

IPC: G06T15/04 ,  G06T15/40 ,  G06T15/00 ,  G06T1/60

Abstract: Methods and primitive block generators for generating primitive blocks in a graphics processing system. The methods comprise: receiving transformed position data for a current primitive, the transformed position data indicating a position of the current primitive in rendering space; determining a distance between the position of the current primitive and a position of a current primitive block based on the transformed position data for the current primitive; determining whether to add the current primitive to the current primitive block based on the distance and a fullness of the current primitive block; in response to determining that the current primitive is to be added to the current primitive block, adding the current primitive to the current primitive block; and in response to determining that the current primitive is not to be added to the current primitive block, flushing the current primitive block and adding the current primitive to a new current primitive block.

公开(公告)号：US11151685B2

公开(公告)日：2021-10-19

申请号：US17026506

申请日：2020-09-21

Applicant: Imagination Technologies Limited

Inventor： Robert Brigg ,  Lorenzo Belli

IPC: G06T1/20 ,  G06T1/60 ,  G06T15/00

Abstract: Tiling engines and methods for use in a graphics processing system for hierarchically tiling a plurality of primitives. The tiling engine includes: a chain of sorting units comprising a top level sorting unit followed by one or more lower level sorting units, wherein: the top level sorting unit is configured to: determine which of a plurality of regions of a render space each of the plurality of primitives, at least partially, falls within; and for each region a primitive, at least partially, falls within, store an identifier of that primitive in a queue of the top level sorting unit that is associated with that region; and each of the one or more lower level sorting units is configured to: select one or more queues of a preceding sorting unit in the chain to process; for each of the selected queues, determine which of a plurality of sub-regions of the region associated with that queue each of the primitives identified in that queue, at least partially, falls within; and for each sub-region a primitive, at least partially, falls within, store an identifier of that primitive in a queue of the lower level sorting unit that is associated with that sub-region; and an output unit configured to output the primitives identified in the queues of the last lower level sorting unit in the chain on a queue by queue basis.

公开(公告)号：US20210200441A1

公开(公告)日：2021-07-01

申请号：US17134803

申请日：2020-12-28

Applicant: Imagination Technologies Limited

Inventor： Robert Brigg

IPC: G06F3/06 ,  H03M7/40

Abstract: Methods and systems for storing a set of two or more variable length data blocks in memory. Each variable length data block having a maximum size of N*B, wherein N is an integer greater than or equal to two, and B is a maximum data size that can be written to the memory using a single memory access request. The method includes: storing, for each variable length data block of the set, the first P non-overlapping portions of size B of the variable length data block in a chunk of the memory allocated to that variable length data block, wherein P is a minimum of (i) a number of non-overlapping portions of size B of the variable length data block and (ii) X which is an integer less than N; storing any remaining portions of the variable length data blocks in a remainder section of the memory that is shared between the variable length data blocks of the set; and storing in a header section of the memory information indicating the size of each of the variable length data blocks in the set.

公开(公告)号：US20200242828A1

公开(公告)日：2020-07-30

申请号：US16775796

申请日：2020-01-29

Applicant: Imagination Technologies Limited

Inventor： Robert Brigg ,  John Howson ,  Xile Yang

IPC: G06T15/00 ,  G06T17/10

Abstract: A graphics processing system for generating a rendering output includes geometry processing logic and rasterization logic. The geometry processing logic includes first transformation logic configured to transform a plurality of untransformed primitives into a plurality of transformed primitives, the first transformation logic configured to implement one or more expansion transformation stages which generate one or more sub-primitives; a primitive block generator configured to: divide the plurality of transformed primitives into a plurality of groups; and generate an untransformed primitive block for each group comprising (i) information identifying the untransformed primitives related to the transformed primitives in the group; and (ii) an expansion transformation stage mask for at least one of the one or more expansion transformation stages that indicates the sub-primitives generated for the untransformed primitives in that untransformed primitive block that are to be used in generating the rendering output. The rasterization logic comprising: second transformation logic configured to re-transform the plurality of untransformed primitives into the plurality of transformed primitives on an untransformed primitive block-basis in accordance with the expansion transformation stage mask for the at least one of the one or more expansion transformation stages; and logic configured to render the transformed primitives to generate the rendering output.