公开(公告)号：US20170256519A1

公开(公告)日：2017-09-07

申请号：US15600050

申请日：2017-05-19

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Frank Lambrecht

IPC: H01L25/065 ,  H01L23/36

CPC classification number: H01L25/0657 ,  G06F1/18 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/3672 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/525 ,  H01L23/5385 ,  H01L24/24 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/3011 ,  H05K1/0243 ,  H05K1/181 ,  H05K2201/10159 ,  H05K2201/10545 ,  H05K2201/10734 ,  Y02P70/611

Abstract: A microelectronic assembly (300) or system (1500) includes at least one microelectronic package (100) having a microelectronic element (130) mounted face up above a first surface (108) of a substrate (102), one or more columns (138, 140) of contacts (132) extending in a first direction (142) along the microelectronic element front face. Columns (104A, 105B, 107A, 107B) of terminals (105 107) exposed at a second surface (110) of the substrate extend in the first direction. First terminals (105) exposed at surface (110) in a central region (112) thereof having width (152) not more than three and one-half times a minimum pitch (150) of the columns of terminals can be configured to carry address information usable to determine an addressable memory location. An axial plane of the microelectronic element can intersect the central region.

公开(公告)号：US09679876B2

公开(公告)日：2017-06-13

申请号：US15168789

申请日：2016-05-31

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Frank Lambrecht

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L25/10 ,  H05K1/18 ,  G06F1/18 ,  H01L23/00 ,  H01L23/367 ,  H01L23/538 ,  H01L23/36 ,  H01L23/48 ,  H01L23/525 ,  H01L21/56 ,  H01L23/50 ,  H05K1/02

CPC classification number: H01L25/0657 ,  G06F1/18 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/3672 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/525 ,  H01L23/5385 ,  H01L24/24 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/3011 ,  H05K1/0243 ,  H05K1/181 ,  H05K2201/10159 ,  H05K2201/10545 ,  H05K2201/10734 ,  Y02P70/611

Abstract: A microelectronic assembly (300) or system (1500) includes at least one microelectronic package (100) having a microelectronic element (130) mounted face up above a first surface (108) of a substrate (102), one or more columns (138, 140) of contacts (132) extending in a first direction (142) along the microelectronic element front face. Columns (104A, 105B, 107A, 107B) of terminals (105 107) exposed at a second surface (110) of the substrate extend in the first direction. First terminals (105) exposed at surface (110) in a central region (112) thereof having width (152) not more than three and one-half times a minimum pitch (150) of the columns of terminals can be configured to carry address information usable to determine an addressable memory location. An axial plane of the microelectronic element can intersect the central region.

公开(公告)号：US20170069575A1

公开(公告)日：2017-03-09

申请号：US15257152

申请日：2016-09-06

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Wael Zohni ,  Cyprian Emeka Uzoh

IPC: H01L23/538 ,  H01L25/00 ,  H01L21/56 ,  H01L25/10 ,  H01L23/31 ,  H01L21/48

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15311

Abstract: A microelectronic assembly can be made by forming a redistribution structure supported on a carrier, the structure including two or more layers of deposited dielectric material and two or more electrically conductive layers and including conductive features such as pads and traces electrically interconnected by vias. Electrical connectors may project above a second surface of the structure opposite an interconnection surface of the redistribution structure adjacent to the carrier. A microelectronic element may be attached and electrically connected with conductive features at the second surface, and a dielectric encapsulation can be formed contacting the second surface and surfaces of the microelectronic element. Electrically conductive features at the interconnection surface can be configured for connection with corresponding features of a first external component, and the electrical connectors can be configured for connection with corresponding features of a second external component.

Abstract translation: 微电子组件可以通过形成负载在载体上的再分布结构来制造，该结构包括两层或更多层沉积的电介质材料和两个或更多个导电层，并且包括导电特征，例如通过通孔电连接的焊盘和迹线。 电连接器可以突出在结构的第二表面之上，与邻近载体的再分布结构的互连表面相对。 微电子元件可以在第二表面处附接并与导电特征电连接，并且可以形成接触微电子元件的第二表面和表面的电介质封装。 互连表面处的导电特征可以被配置为与第一外部部件的对应特征相连接，并且电连接器可被配置为与第二外部部件的对应特征相连接。

公开(公告)号：US09508629B2

公开(公告)日：2016-11-29

申请号：US15050070

申请日：2016-02-22

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Wael Zohni ,  Richard Dewitt Crisp ,  Ilyas Mohammed

IPC: H01L23/48 ,  H01L23/538 ,  H01L25/065 ,  H01L25/18 ,  G11C5/04 ,  H01L23/12 ,  H01L27/108 ,  H01L23/31 ,  H01L23/00 ,  H01L23/13 ,  H01L23/36 ,  H01L23/498

CPC classification number: H01L23/481 ,  G11C5/04 ,  H01L23/12 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49838 ,  H01L23/538 ,  H01L23/5386 ,  H01L24/06 ,  H01L24/09 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/18 ,  H01L27/108 ,  H01L2224/0401 ,  H01L2224/061 ,  H01L2224/091 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1203 ,  H01L2924/1205 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/1443 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/157 ,  H01L2924/15786 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/301 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package can include a substrate having first and second opposed surfaces, at least two pairs of microelectronic elements, and a plurality of terminals exposed at the second surface. Each pair of microelectronic elements can include an upper microelectronic element and a lower microelectronic element. The pairs of microelectronic elements can be fully spaced apart from one another in a horizontal direction parallel to the first surface of the substrate. Each lower microelectronic element can have a front surface facing the first surface of the substrate and a plurality of contacts at the front surface. A surface of each of the upper microelectronic elements can at least partially overlie a rear surface of the lower microelectronic element in its pair. The microelectronic package can also include electrical connections extending from at least some of the contacts of each lower microelectronic element to at least some of the terminals.

公开(公告)号：US09490222B1

公开(公告)日：2016-11-08

申请号：US14880967

申请日：2015-10-12

Applicant: Invensas Corporation

Inventor： Abiola Awujoola ,  Zhuowen Sun ,  Wael Zohni ,  Ashok S. Prabhu ,  Willmar Subido

IPC: H01L23/552 ,  H01L23/00

CPC classification number: H01L23/552 ,  H01L23/49811 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/215 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/4942 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73227 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05599

Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.

Abstract translation: 公开了一般涉及具有防止干扰的微电子封装的装置。 在其装置中，基板具有与上表面相对的上表面和下表面，并具有接地平面。 第一微电子器件耦合到衬底的上表面。 引线接合线耦合到接地平面，用于对其进行干涉并延伸离开衬底的上表面。 引线接合线的第一部分被定位成相对于干涉为第一微电子器件提供屏蔽区域。 导线接合线的第二部分不定位成提供屏蔽区域。 第二微电子器件耦合到衬底并且位于屏蔽区域外部。 导电表面在用于覆盖屏蔽区域的引线接合线的第一部分之上。

公开(公告)号：US09460758B2

公开(公告)日：2016-10-04

申请号：US14753607

申请日：2015-06-29

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Yong Chen ,  Belgacem Haba ,  Wael Zohni ,  Zhuowen Sun

IPC: G11C5/00 ,  G11C5/02 ,  G11C5/06 ,  G11C8/00 ,  G11C8/16 ,  G11C8/18 ,  H01L23/00 ,  H01L25/065 ,  G11C5/04 ,  G11C8/12 ,  G11C11/408 ,  H01L23/538 ,  H01L25/10

CPC classification number: G11C5/025 ,  G11C5/04 ,  G11C5/063 ,  G11C8/12 ,  G11C11/408 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/00 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1436 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A microelectronic package can include a support element having first and second surfaces and substrate contacts at the first or second surface, zeroth and first stacked microelectronic elements electrically coupled with the substrate contacts, and terminals at the second surface electrically coupled with the microelectronic elements. The second surface can have a southwest region encompassing entire lengths of south and west edges of the second surface and extending in orthogonal directions from the south and west edges one-third of each distance toward north and east edges of the second surface, respectively. The terminals can include first terminals at a southwest region of the second surface, the first terminals configured to carry address information usable by circuitry within the microelectronic package to determine an addressable memory location from among all the available addressable memory locations of the memory storage arrays of at least one of the zeroth or first microelectronic elements.

公开(公告)号：US20160233193A1

公开(公告)日：2016-08-11

申请号：US15131522

申请日：2016-04-18

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Wael Zohni

IPC: H01L25/065 ,  H01L23/373 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/0652 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/3185 ,  H01L23/3736 ,  H01L24/06 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/50 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/07 ,  H01L2224/04042 ,  H01L2224/06156 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/50 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/18165 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package can include a substrate having first and second opposed surfaces extending in first and second transverse directions and an opening extending between the first and second surfaces and defining first and second distinct parts each elongated along a common axis extending in the first direction, first and second microelectronic elements each having a front surface facing the first surface of the substrate and a column of contacts at the respective front surface, a plurality of terminals exposed at the second surface, and first and second electrical connections aligned with the respective first and second parts of the opening and extending from at least some of the contacts of the respective first and second microelectronic elements to at least some of the terminals. The column of contacts of the first and second microelectronic elements can be aligned with the respective first and second parts of the opening.

公开(公告)号：US20160197058A1

公开(公告)日：2016-07-07

申请号：US15069131

申请日：2016-03-14

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Frank Lambrecht

IPC: H01L25/065 ,  G11C8/18

CPC classification number: H01L25/0657 ,  G11C5/04 ,  G11C5/063 ,  G11C5/066 ,  G11C8/18 ,  H01L23/02 ,  H01L23/13 ,  H01L23/48 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49113 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/85

Abstract: A microelectronic assembly can include a microelectronic package connected with a circuit panel. The package has a microelectronic element having a front face facing away from a substrate of the package, and electrically connected with the substrate through conductive structure extending above the front face. First terminals provided in first and second parallel grids or in first and second individual columns can be configured to carry address information usable to determine an addressable memory location from among all the available addressable memory locations of the memory storage array. The first terminals in the first grid can have signal assignments which are a mirror image of the signal assignments of the first terminals in the second grid.

公开(公告)号：US09355996B2

公开(公告)日：2016-05-31

申请号：US14837561

申请日：2015-08-27

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Richard Dewitt Crisp ,  Wael Zohni ,  Ilyas Mohammed

IPC: H01L21/00 ,  H01L25/065 ,  H01L23/13 ,  H01L23/538 ,  H01L23/31 ,  H01L23/498 ,  H01L23/525 ,  H01L25/10 ,  H01L23/00

CPC classification number: H01L23/5386 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/525 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A chip package has multiple chips that may be arranged side-by-side or in a staggered, stair step arrangement. The contacts of the chips are connected to interconnect pads carried on the chips themselves or on a redistribution substrate. The interconnect pads desirably are arranged in a relatively narrow interconnect zone, such that the interconnect pads can be readily wire-bonded or otherwise connected to a package substrate.

公开(公告)号：US09318467B2

公开(公告)日：2016-04-19

申请号：US14563240

申请日：2014-12-08

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Wael Zohni

IPC: H01L23/52 ,  H01L25/065 ,  H01L23/13 ,  H01L25/07 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L25/0652 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/3185 ,  H01L23/3736 ,  H01L24/06 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/50 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/07 ,  H01L2224/04042 ,  H01L2224/06156 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/50 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/18165 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package can include a substrate having first and second opposed surfaces extending in first and second transverse directions and an opening extending between the first and second surfaces and defining first and second distinct parts each elongated along a common axis extending in the first direction, first and second microelectronic elements each having a front surface facing the first surface of the substrate and a column of contacts at the respective front surface, a plurality of terminals exposed at the second surface, and first and second electrical connections aligned with the respective first and second parts of the opening and extending from at least some of the contacts of the respective first and second microelectronic elements to at least some of the terminals. The column of contacts of the first and second microelectronic elements can be aligned with the respective first and second parts of the opening.

Abstract translation: 微电子封装可以包括具有在第一和第二横向方向上延伸的第一和第二相对表面的基板和在第一和第二表面之间延伸的开口，并且限定第一和第二不同部分，每个沿着沿着第一方向延伸的共同轴线延伸， 以及第二微电子元件，每个具有面向衬底的第一表面的前表面和在相应的前表面处的接触柱，在第二表面处暴露的多个端子以及与相应的第一和第二表面对准的第一和第二电连接 开口的部分并且从相应的第一和第二微电子元件的至少一些触点延伸到至少一些端子。 第一和第二微电子元件的接触柱可以与开口的相应的第一和第二部分对准。