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    Method for forming vias and method for forming contacts in vias
    63.
    发明授权
    Method for forming vias and method for forming contacts in vias 有权

    公开(公告)号：US11037820B2

    公开(公告)日：2021-06-15

    申请号：US16719596

    申请日：2019-12-18

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Tzu-Yang Lin ,  Cheng-Han Wu ,  Ching-Yu Chang ,  Chin-Hsiang Lin

    IPC: H01L21/00 ,  H01L21/768 ,  H01L21/033 ,  H01L21/027

    Abstract: A method for forming openings in an underlayer includes: forming a photoresist layer on an underlayer formed on a substrate; exposing the photoresist layer; forming photoresist patterns by developing the exposed photoresist layer, the photoresist patterns covering regions of the underlayer in which the openings are to be formed; forming a liquid layer over the photoresist patterns; after forming the liquid layer, performing a baking process so as to convert the liquid layer to an organic layer in a solid form; performing an etching back process to remove a portion of the organic layer on a level above the photoresist patterns; removing the photoresist patterns, so as to expose portions of the underlayer by the remaining portion of the organic layer; forming the openings in the underlayer by using the remaining portion of the organic layer as an etching mask; and removing the remaining portion of the organic layer.

    Photosensitive middle layer
    64.
    发明授权
    Photosensitive middle layer 有权

    公开(公告)号：US11022885B2

    公开(公告)日：2021-06-01

    申请号：US16119880

    申请日：2018-08-31

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chun-Chih Ho ,  Kuan-Hsin Lo ,  Ching-Yu Chang ,  Chin-Hsiang Lin

    IPC: G03F7/004 ,  G03F7/038 ,  G03F7/039 ,  G03F7/075 ,  G03F7/11 ,  G03F7/16 ,  G03F7/20 ,  G03F7/32

    Abstract: A method includes providing a substrate; forming a bottom layer over the substrate; forming a middle layer over the bottom layer, a top surface of which including a photosensitive moiety having a first end anchored in the middle layer and a second end extending away from the top surface of the middle layer; forming a photoresist layer over the middle layer; exposing the photoresist layer to a radiation source; and developing the photoresist layer to form a pattern. The photosensitive moiety, which includes one of a photo-acid generator (PAG), a photo-base generator (PBG), photo-decomposable base (PDB), or photo-decomposable quencher (PDQ), may be anchored to a polymer backbone forming the middle layer via one or more linker groups. A distance by which the photosensitive moiety extends into the photoresist layer may be determined by a length of the linker group.

    Patterning Methods for Semiconductor Devices
    66.
    发明申请
    Patterning Methods for Semiconductor Devices 有权

    公开(公告)号：US20210134656A1

    公开(公告)日：2021-05-06

    申请号：US17119692

    申请日：2020-12-11

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wei-Ren Wang ,  Shing-Chyang Pan ,  Ching-Yu Chang ,  Wan-Lin Tsai ,  Jung-Hau Shiu ,  Tze-Liang Lee

    IPC: H01L21/768 ,  H01L21/311 ,  H01L21/02 ,  H01L21/033

    Abstract: Semiconductor devices and methods of forming semiconductor devices are provided. A method includes forming a first mask layer over an underlying layer, patterning the first mask layer to form a first opening, forming a non-conformal film over the first mask layer, wherein a first thickness of the non-conformal film formed on the top surface of the first mask layer is greater than a second thickness of the non-conformal film formed on a sidewall surface of the first mask layer, performing a descum process, wherein the descum process removes a portion of the non-conformal film within the first opening, and etching the underlying layer using the patterned first mask layer and remaining portions of the non-conformal film as an etching mask.

    Material composition and methods thereof
    68.
    发明授权
    Material composition and methods thereof 有权

    公开(公告)号：US10863630B2

    公开(公告)日：2020-12-08

    申请号：US16723818

    申请日：2019-12-20

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Siao-Shan Wang ,  Cheng-Han Wu ,  Ching-Yu Chang ,  Chin-Hsiang Lin

    IPC: H05K3/06 ,  G03F7/09 ,  H01L21/027 ,  G03F7/00 ,  G03F7/20 ,  G03F7/40

    Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate. The patterned resist layer has a first pattern width, and the patterned resist layer has a first pattern profile having a first proportion of active sites. In some examples, the patterned resist layer is coated with a treatment material. In some embodiments, the treatment material bonds to surfaces of the patterned resist layer to provide a treated patterned resist layer having a second pattern profile with a second proportion of active sites greater than the first proportion of active sites. By way of example, and as part of the coating the patterned resist layer with the treatment material, a first pattern shrinkage process may be performed, where the treated patterned resist layer has a second pattern width less than a first pattern width.

    Method Composition and Methods Thereof
    69.
    发明申请
    Method Composition and Methods Thereof 审中-公开

    公开(公告)号：US20200335349A1

    公开(公告)日：2020-10-22

    申请号：US16889448

    申请日：2020-06-01

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Siao-Shan Wang ,  Cheng-Han Wu ,  Ching-Yu Chang ,  Chin-Hsiang LIN

    IPC: H01L21/308 ,  H01L21/027 ,  G03F7/40 ,  G03F7/26

    Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate, where the patterned resist layer has a first line width roughness. In various embodiments, the patterned resist layer is coated with a treatment material, where a first portion of the treatment material bonds to surfaces of the patterned resist layer. In some embodiments, a second portion of the treatment material (e.g., not bonded to surfaces of the patterned resist layer) is removed, thereby providing a treated patterned resist layer, where the treated patterned resist layer has a second line width roughness less than the first line width roughness.

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