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    Power Supply
    61.
    发明申请
    Power Supply 审中-公开
    电源

    公开(公告)号：US20140300192A1

    公开(公告)日：2014-10-09

    申请号：US14128297

    申请日：2012-06-20

    Applicant: Les Price ,  Stephen Fowlston ,  David Gareth Williams

    Inventor： Les Price ,  Stephen Fowlston ,  David Gareth Williams

    IPC: H02J1/14 ,  H02J9/04

    CPC classification number: H02J1/14 ,  G06F1/26 ,  G06F11/2015 ,  H02J1/102 ,  H02J3/46 ,  H02J4/00 ,  H02J9/04 ,  H02J2001/106 ,  Y10T307/555

    Abstract: The invention can provide for a power supply, and in particular a fieldbus power supply, comprising a plurality of power supply modules each arranged to output power on a plurality of channels; a current share controller arranged to share an output current requirement across the plurality of power supply modules and wherein; at least a second of the plurality of channels in each module is arranged to track the loading of the first of the plurality of channels in each respective module and so that a multichannel and multimodule power supply with reduced power handling requirements for each module can be provided.

    Abstract translation: 本发明可以提供电源，特别是现场总线电源，其包括多个电源模块，每个电源模块被布置成在多个通道上输出功率; 当前共享控制器被布置成在所述多个电源模块之间共享输出电流要求，并且其中; 每个模块中的多个通道中的至少一个通道被布置成跟踪每个相应模块中的多个通道中的第一个通道的负载，并且可以提供对每个模块具有降低的功率处理要求的多通道和多模块电源 。

    Two-way raid controller with programmable host interface for a semiconductor storage device
    62.
    发明授权
    Two-way raid controller with programmable host interface for a semiconductor storage device 有权
    双向RAID控制器，具有可编程主机接口，用于半导体存储设备

    公开(公告)号：US08819316B2

    公开(公告)日：2014-08-26

    申请号：US13165102

    申请日：2011-06-21

    Applicant: Byungcheol Cho

    Inventor： Byungcheol Cho

    IPC: G06F13/14 ,  G06F3/06

    CPC classification number: G06F3/0658 ,  G06F3/061 ,  G06F3/0688 ,  G06F11/1441 ,  G06F11/2015

    Abstract: Provided is a two-way RAID controlled storage device of a serial attached small computer system interface/serial advanced technology attachment (PCI-Express) type, which provides data storage/reading services through a PCI-Express interface. The RAID controller typically comprises multiple sets of RAID equipment coupled to one another via a hardware host connect, an adaptive host interface controller, a host connect controller, a two-way RAID controller, a disk connect controller, an adaptive disk mount controller, and a hardware disk connect. Coupled to the hardware disk connect are a set of DDR, SSD memory disk units. Further, each set of RAID equipment typically comprises a programmable host interface unit, a disk controller, a high speed host interface, a disk monitoring unit, a disk plug and play controllers, and a programmable disk mount.

    Abstract translation: 提供了一种串行连接的小型计算机系统接口/串行高级技术附件（PCI-Express）类型的双向RAID控制存储设备，通过PCI-Express接口提供数据存储/读取服务。 RAID控制器通常包括通过硬件主机连接彼此耦合的多组RAID设备，自适应主机接口控制器，主机连接控制器，双向RAID控制器，磁盘连接控制器，自适应磁盘安装控制器和 一个硬盘连接。 加上硬盘连接是一组DDR，SSD内存盘单元。 此外，每组RAID设备通常包括可编程主机接口单元，磁盘控制器，高速主机接口，磁盘监视单元，磁盘即插即用控制器和可编程磁盘安装。

    Mass-storage system utilizing auxiliary solid-state storage subsystem
    64.
    发明授权
    Mass-storage system utilizing auxiliary solid-state storage subsystem 有权
    利用辅助固态存储子系统的大容量存储系统

    公开(公告)号：US08806165B2

    公开(公告)日：2014-08-12

    申请号：US13263003

    申请日：2009-10-27

    Applicant: Moshe Selfin ,  Daniel Golan ,  Yedidia Atzmony

    Inventor： Moshe Selfin ,  Daniel Golan ,  Yedidia Atzmony

    IPC: G06F12/00 ,  G06F11/20 ,  G06F3/06 ,  G06F11/14

    CPC classification number: G06F3/0647 ,  G06F3/061 ,  G06F3/0631 ,  G06F3/068 ,  G06F3/0685 ,  G06F11/1441 ,  G06F11/2015 ,  G06F11/2074 ,  G06F11/2087

    Abstract: A mass storage system including main and auxiliary storage subsystems and a controller Main storage provides physical storage space and includes non-solid-state storage devices (“NSSDs”) NSSDs provide physical locations, and main storage includes physical storage locations provided by NSSDs Controller is coupled to main storage and may be configured for mapping logical addresses to physical locations, giving rise to a logical storage space The auxiliary subsystem includes a solid-state data retention device (“SSDRD”) capable of permanently storing data and provides a physical location, giving rise to auxiliary space Controller is coupled to the auxiliary subsystem and may override a mapping of logical addresses to physical locations, with a mapping of logical address to physical locations within the auxiliary space, overriding physical storage locations Controller is adapted for loading a snapshot of the data currently stored in the overridden physical storage locations.

    Abstract translation: 主存储系统包括主存储子系统和辅助存储子系统以及控制器主存储器提供物理存储空间，并且包括非固态存储设备（“NSSD”）NSSD提供物理位置，主存储包括NSSD提供的物理存储位置控制器 耦合到主存储器并且可以被配置为将逻辑地址映射到物理位置，从而产生逻辑存储空间辅助子系统包括能够永久存储数据并提供物理位置的固态数据保持设备（“SSDRD”）， 引起辅助空间控制器耦合到辅助子系统，并且可以覆盖逻辑地址到物理位置的映射，逻辑地址与辅助空间内的物理位置的映射，覆盖物理存储位置控制器适于加载 当前存储在重写的物理存储位置的数据。

    Data path differentiator for pre-emphasis requirement or slot identification
    65.
    发明授权
    Data path differentiator for pre-emphasis requirement or slot identification 有权
    用于预加重要求或槽识别的数据路径微分器

    公开(公告)号：US08767768B2

    公开(公告)日：2014-07-01

    申请号：US13166691

    申请日：2011-06-22

    Applicant: Alan Frank Jovanovich ,  Stephen Eugene Holness

    Inventor： Alan Frank Jovanovich ,  Stephen Eugene Holness

    IPC: H04L12/66

    CPC classification number: G06F13/4022 ,  G06F11/2005 ,  G06F11/2007 ,  G06F11/2012 ,  G06F11/2015

    Abstract: An apparatus and method is disclosed for generating path length information for two (usually redundant) receive paths in a receiving device such as a server blade so that the proper amount of equalization and/or pre-emphasis may be applied to receiver and driver circuits in the server blade. In one embodiment, the path length information comprises a longer or shorter path determination, and may also include a estimation of the slot location. In another embodiment, the path length information comprises a representation of the length of two receive paths. The path length information generating circuit is connected to the two receive inputs of the receiving device though high impedance elements, and the path length information may be utilized by hardware or a processor to set the equalization or pre-emphasis in the receiver and/or driver.

    Abstract translation: 公开了一种用于为诸如服务器刀片的接收设备中的两个（通常是冗余的）接收路径生成路径长度信息的装置和方法，使得适当量的均衡和/或预加重可以应用于接收机和驱动器电路 服务器刀片。 在一个实施例中，路径长度信息包括更长或更短的路径确定，并且还可以包括时隙位置的估计。 在另一个实施例中，路径长度信息包括两个接收路径的长度的表示。 路径长度信息生成电路通过高阻抗元件连接到接收装置的两个接收输入，并且路径长度信息可被硬件或处理器用于在接收器和/或驱动器中设置均衡或预加重 。

    STORAGE APPARATUS
    66.
    发明申请
    STORAGE APPARATUS 有权
    存储设备

    公开(公告)号：US20140181565A1

    公开(公告)日：2014-06-26

    申请号：US14132489

    申请日：2013-12-18

    Applicant: Hitachi, Ltd.

    Inventor： Ryohei OGURO ,  Yosuke Tsuyuki

    IPC: G06F1/32

    CPC classification number: G06F1/3275 ,  G06F1/305 ,  G06F11/1076 ,  G06F11/2015 ,  G06F11/3034 ,  G06F11/3062

    Abstract: A storage apparatus writes data to a storage drive or reads data from a storage drive in response to an I/O request sent from a server. The storage apparatus includes a plurality of AC-DC power supplies supplying the storage drive with drive power is provided with a plurality of power supply paths provided for the respective AC-DC power supplies. A plurality of gate units are provided to the respective power supply paths and configured to stop supplying drive power to the storage drive through the corresponding power supply path when detecting voltage abnormality in the drive power supplied from the AC-DC power supply to the storage drive. The power supply paths allow each of the storage drives belonging to a same RAID group to receive the supply of the drive power from the AC-DC power supplies through different power supply paths, respectively.

    Abstract translation: 存储装置响应于从服务器发送的I / O请求将数据写入存储驱动器或从存储驱动器读取数据。 存储装置包括向存储驱动器提供驱动电力的多个AC-DC电源，其具有为各AC-DC电源提供的多个电源路径。 多个门单元设置到各个电源路径，并且被配置为当检测到从AC-DC电源向存储驱动器提供的驱动电力中的电压异常时，通过相应的电源路径停止向存储驱动器提供驱动电力 。 电源路径允许属于同一RAID组的每个存储驱动器分别通过不同的电源路径从AC-DC电源接收驱动电力的供应。

    NON-VOLATILE HYBRID MEMORY
    67.
    发明申请
    NON-VOLATILE HYBRID MEMORY 有权
    非挥发性混合记忆体

    公开(公告)号：US20140181361A1

    公开(公告)日：2014-06-26

    申请号：US13725177

    申请日：2012-12-21

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： Andrew G. Kegel

    IPC: G06F12/06

    CPC classification number: G06F12/0638 ,  G06F3/0679 ,  G06F11/0751 ,  G06F11/2015 ,  G06F12/0804 ,  G06F12/0866

    Abstract: Memory units and computer systems are provided. The computer systems include a memory unit. The memory unit includes a stable storage unit, an unstable storage unit, and a controller. The unstable storage unit stores pending write operations for the stable storage unit. The controller is configured to determine the locations in the unstable storage that store the pending write information and to selectively write the pending write operations to the stable storage unit when power to the memory unit is interrupted.

    Abstract translation: 提供内存单元和计算机系统。 计算机系统包括存储单元。 存储单元包括稳定存储单元，不稳定存储单元和控制器。 不稳定存储单元存储稳定存储单元的待处理写入操作。 控制器被配置为确定存储未决写入信息的不稳定存储器中的位置，并且当对存储器单元的电力中断时，有选择地将待决写入操作写入稳定存储单元。

    INFORMATION PROCESSING DEVICE, STORAGE PROCESSING METHOD, AND COMPUTER READABLE RECORDING MEDIUM HAVING PROGRAM STORED THEREIN
    68.
    发明申请
    INFORMATION PROCESSING DEVICE, STORAGE PROCESSING METHOD, AND COMPUTER READABLE RECORDING MEDIUM HAVING PROGRAM STORED THEREIN 有权
    信息处理设备，存储处理方法和具有存储程序的计算机可读记录介质

    公开(公告)号：US20140173233A1

    公开(公告)日：2014-06-19

    申请号：US14075250

    申请日：2013-11-08

    Applicant: FUJITSU LIMITED

    Inventor： Takashi HIGASHIYAMA

    IPC: G06F3/06

    CPC classification number: G06F3/0619 ,  G06F3/065 ,  G06F3/0674 ,  G06F11/0727 ,  G06F11/0778 ,  G06F11/1441 ,  G06F11/2015 ,  G06F17/30362

    Abstract: An information processing device includes: a calculator that calculates the number of pages used for storing management information in a first storage medium; a storage processor that sets pages corresponding to the calculated number of pages as free pages and stores the management information in the set free pages to thereby store the management information in the first storage medium; and an update processor that performs a process of updating position management information that indicates a storage position of the management information in the first storage medium. The information processing device can quickly write out logs on a memory.

    Abstract translation: 一种信息处理设备，包括：计算器，用于计算在第一存储介质中存储管理信息的页数; 存储处理器，其将与所计算的页数相对应的页面设置为空闲页面，并将所述管理信息存储在所设置的空闲页面中，从而将所述管理信息存储在所述第一存储介质中; 以及更新处理器，其执行更新指示所述管理信息在所述第一存储介质中的存储位置的位置管理信息的处理。 信息处理设备可以在存储器上快速写入日志。

    Isolation Switching For Backup Memory
    69.
    发明申请
    Isolation Switching For Backup Memory 有权
    隔离切换备份内存

    公开(公告)号：US20140156919A1

    公开(公告)日：2014-06-05

    申请号：US14173219

    申请日：2014-02-05

    Applicant: Netlist, Inc.

    Inventor： Chi-She Chen ,  Jeffrey C. Solomon ,  Scott H. Milton ,  Jayesh Bhakta

    IPC: G06F12/02

    CPC classification number: G06F3/061 ,  G06F3/0634 ,  G06F3/065 ,  G06F3/0655 ,  G06F3/0688 ,  G06F11/1072 ,  G06F11/1441 ,  G06F11/2015 ,  G06F12/00 ,  G06F12/0246 ,  G06F2212/7201 ,  G11C5/141 ,  G11C5/143 ,  G11C7/1072 ,  G11C11/005 ,  G11C14/0018 ,  G11C29/52

    Abstract: Certain embodiments described herein include a memory system having a volatile memory subsystem, a non-volatile memory subsystem, a controller coupled to the non-volatile memory subsystem, and a circuit coupled to the volatile memory subsystem, to the controller, and to a host system. In a first mode of operation, the circuit is operable to selectively isolate the controller from the volatile memory subsystem, and to selectively couple the volatile memory subsystem to the host system to allow data to be communicated between the volatile memory subsystem and the host system. In a second mode of operation, the circuit is operable to selectively couple the controller to the volatile memory subsystem to allow data to be communicated between the volatile memory subsystem and the nonvolatile memory subsystem using the controller, and the circuit is operable to selectively isolate the volatile memory subsystem from the host system.

    Abstract translation: 本文描述的某些实施例包括具有易失性存储器子系统，非易失性存储器子系统，耦合到非易失性存储器子系统的控制器和耦合到易失性存储器子系统的电路，到控制器以及主机的存储器系统 系统。 在第一操作模式中，电路可操作以选择性地将控制器与易失性存储器子系统隔离开，并且将易失性存储器子系统选择性地耦合到主机系统以允许在易失性存储器子系统和主机系统之间传送数据。 在第二操作模式中，电路可操作以选择性地将控制器耦合到易失性存储器子系统，以允许使用控制器在易失性存储器子系统和非易失性存储器子系统之间传送数据，并且该电路可操作以选择性地隔离 来自主机系统的易失性存储器子系统。

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