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    Process for producing multilayer wiring boards
    61.
    发明授权
    Process for producing multilayer wiring boards 失效
    多层布线板的制造方法

    公开(公告)号：US6010956A

    公开(公告)日：2000-01-04

    申请号：US807504

    申请日：1997-02-27

    Applicant: Yoshikazu Takiguchi ,  Hiroyuki Obiya ,  Toru Takahashi ,  Taisuke Shiroyama ,  Kenji Tazawa

    Inventor： Yoshikazu Takiguchi ,  Hiroyuki Obiya ,  Toru Takahashi ,  Taisuke Shiroyama ,  Kenji Tazawa

    IPC: H05K3/00 ,  H05K3/46 ,  H01L21/4763

    CPC classification number: H05K3/0044 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2203/025 ,  Y10S428/901 ,  Y10T428/24917

    Abstract: An improved process for producing a multilayer wiring board that has a plurality of conductor patterns and an interlevel dielectric layer on at least one surface of a substrate, with via holes or trench-like channels being provided at specified sites of said interlevel dielectric layer to establish an electrical interconnection between said conductor patterns, wherein prior to the provision of said via holes or trench-like channels, a coating having resistance to sandblasting is formed in a pattern over the interlevel dielectric layer and then sandblasting is performed to remove the interlevel dielectric layer in selected areas to form the via holes or trench-like channels and, thereafter, the coating having resistance to sandblasting is removed, followed by the provision of a conductive layer.

    Abstract translation: 一种改进的制造多层布线板的方法，该多层布线板在衬底的至少一个表面上具有多个导体图案和层间电介质层，在所述层间电介质层的特定位置设置通孔或沟槽状沟道，以建立 所述导体图案之间的电互连，其中在提供所述通孔或沟槽状通道之前，在层间电介质层上以图案形成具有耐喷砂性的涂层，然后进行喷砂以除去层间介电层 在选择的区域中形成通孔或沟槽状通道，然后除去具有耐喷砂性的涂层，然后提供导电层。

    Laser lithography for integrated circuit and integrated circuit interconnect manufacture
    68.
    发明授权
    Laser lithography for integrated circuit and integrated circuit interconnect manufacture 失效
    集成电路和集成电路互连制造的激光雕刻

    公开(公告)号：US5196376A

    公开(公告)日：1993-03-23

    申请号：US662748

    申请日：1991-03-01

    Applicant: John J. Reche

    Inventor： John J. Reche

    IPC: H01L21/312 ,  H01L21/3213 ,  H01L21/48 ,  H05K3/00 ,  H05K3/06

    CPC classification number: H05K3/061 ,  H01L21/312 ,  H01L21/32139 ,  H01L21/4846 ,  H05K2201/0166 ,  H05K2201/0179 ,  H05K2203/0554 ,  H05K2203/107 ,  H05K3/0041 ,  Y10S438/94

    Abstract: A laser lithography process for semiconductor interconnect and semiconductor manufacture having the advantages of non-contact printing processes and being much faster than prior art laser lithography processes is disclosed. In accordance with the process, a metal layer to be patterned either for use as a patterned metal layer or as a mask for patterning a layer therebelow, such as a think polyimide layer, is first coated with a very thin layer of polymer evaporated as a monomer using a vapor deposition process. This provides a very thin layer of polymer over the metal layer, which thin polymer layer is readily and quickly patterned by laser to provide a mask for the subsequent chemical etching of the metal layer. The vapor deposited polymer layer, while being very thin and thus readily removed by laser, is also substantially fault free, thereby providing a high-quality mask for the chemical etching process free of any possible damage from ordinary sources such as mask aligners, etc., yet being readily removed when desired such as by way of example, by plasma etching thereof. Various methods and applications are disclosed.

    Abstract translation: 公开了一种用于半导体互连和半导体制造的激光光刻工艺，其具有非接触印刷工艺的优点并且比现有技术的激光光刻工艺快得多。 根据该方法，首先将要被图案化的图案化的金属层用作图案化金属层或作为用于图案化层的掩模，例如思亚酰胺层，涂覆有非常薄的作为 单体使用气相沉积工艺。 这在金属层上提供了非常薄的聚合物层，该薄层聚合物层通过激光容易且快速地构图，以提供用于金属层的后续化学蚀刻的掩模。 气相沉积聚合物层虽然非常薄且因此容易通过激光去除，但也基本上是无缺陷的，从而为化学蚀刻工艺提供了高质量的掩模，没有普通来源（例如掩模对准器等）的任何可能的损坏。 ，但是如果需要的话，例如通过等离子体蚀刻就容易除去。 公开了各种方法和应用。

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