-
公开(公告)号：US09648723B2
公开(公告)日：2017-05-09
申请号：US14855635
申请日：2015-09-16
Applicant: International Business Machines Corporation
Inventor： Brian L. Carlson , John R. Dangler , Roger S. Krabbenhoft , Kevin A. Splittstoesser
CPC classification number: H05K3/26 , H01P3/02 , H05K1/0213 , H05K1/0237 , H05K1/0242 , H05K1/0298 , H05K1/0393 , H05K1/09 , H05K1/111 , H05K1/115 , H05K1/181 , H05K3/06 , H05K3/064 , H05K3/382 , H05K3/46 , H05K3/4611 , H05K2201/0355 , H05K2201/0391 , Y10T29/49117 , Y10T29/49124 , Y10T29/49155 , Y10T29/49156
Abstract: A circuit apparatuses include at least one circuit feature formed from patterning a conductive sheet. The conductive sheet includes an irregular surface and a planarized surface. Conductive sheet roughness is minimized in first regions of the circuit apparatus and is maintained in second regions of the circuit apparatus. Selectively planarizing portions of the conductive sheet allows for the utilization of lower cost rougher conductive sheets. The planarized surface allows for increased signal integrity and reduced insertion loss and the irregular surface allows for increased adhesion and enhancing reliability of the circuit apparatus.
-
公开(公告)号：US20170077020A1
公开(公告)日：2017-03-16
申请号：US14978029
申请日：2015-12-22
Applicant: Kabushiki Kaisha Toshiba
Inventor： Hide MABUCHI , Keiji HAMODA , Kazumichi HADA
IPC: H01L23/498 , H01L23/31
CPC classification number: H01L23/49838 , H01L23/13 , H01L23/3107 , H01L23/49555 , H01L2224/48137 , H01L2224/48247 , H01L2224/73257 , H05K1/117 , H05K3/284 , H05K2201/0391 , H05K2201/10159 , H05K2201/1034
Abstract: According to one embodiment, there is provided a semiconductor device including a package. The package includes a first terminal, a second terminal, a semiconductor chip, and a sealing member. The first terminal is compatible with a first bus standard. The second terminal is compatible with a second bus standard. In the semiconductor chip, the first terminal and the second terminal are electrically connected. The sealing member covers one end of the first terminal and one end of the second terminal, exposes an other end of the first terminal and an other end of the second terminal, and covers the semiconductor chip.
Abstract translation: 根据一个实施例，提供了一种包括封装的半导体器件。 封装包括第一端子，第二端子，半导体芯片和密封构件。 第一个终端与第一个总线标准兼容。 第二个终端与第二个总线标准兼容。 在半导体芯片中，第一端子和第二端子电连接。 密封构件覆盖第一端子的一端和第二端子的一端，暴露第一端子的另一端和第二端子的另一端，并且覆盖半导体芯片。
-
公开(公告)号：US20170033089A1
公开(公告)日：2017-02-02
申请号：US15290232
申请日：2016-10-11
Applicant: SHARP KABUSHIKI KAISHA
Inventor： Makoto AGATANI , Toshio HATA , Tomokazu NADA , Shinya ISHIZAKI
IPC: H01L25/075 , H01L33/48 , H01L33/62
CPC classification number: H01L25/0753 , F21K9/00 , F21K9/232 , F21V23/06 , F21Y2101/00 , F21Y2105/10 , F21Y2115/10 , H01L33/483 , H01L33/52 , H01L33/54 , H01L33/62 , H01L2224/48091 , H01L2224/48137 , H01L2924/01327 , H01L2933/0066 , H05K1/11 , H05K2201/0391 , H05K2201/094 , H05K2201/0979 , H05K2201/10106 , H01L2924/00014 , H01L2924/00
Abstract: A light-emitting device capable of ensuring an electric connection between a light-emitting element and an electrode without generating any problem in practical use, by both connecting methods with a solder and a connector, and a lighting device provided with the light-emitting device are provided. The light-emitting device according to the present invention has a plurality of LED chips, and a soldering electrode land and a connector connecting electrode land electrically connected to the chips, on a ceramic substrate. The soldering electrode land is formed of a first conductive material having a function to prevent diffusion to a solder, and the connector connecting electrode land is formed of a second conductive material having a function to prevent oxidation.
Abstract translation: 一种能够确保发光元件和电极之间的电连接而不会在实际使用中产生任何问题的发光装置，通过两种连接方法与焊料和连接器，以及设置有发光装置的照明装置 被提供。 根据本发明的发光装置在陶瓷基板上具有多个LED芯片，以及焊接电极焊盘和与芯片电连接的连接器连接电极焊盘。 焊接电极焊盘由具有防止向焊料扩散的功能的第一导电材料形成，并且连接器连接电极焊盘由具有防止氧化功能的第二导电材料形成。
-
公开(公告)号：US09510464B2
公开(公告)日：2016-11-29
申请号：US13590815
申请日：2012-08-21
Applicant: Tzyy-Jang Tseng , Shu-Sheng Chiang , Tsung-Yuan Chen
Inventor： Tzyy-Jang Tseng , Shu-Sheng Chiang , Tsung-Yuan Chen
CPC classification number: H05K3/465 , C23C18/1612 , C23C18/1651 , C23C18/1653 , C23C18/1689 , H05K1/0265 , H05K3/0032 , H05K3/0035 , H05K3/045 , H05K3/107 , H05K2201/0391 , H05K2201/09509 , Y10T29/49155 , Y10T29/49165
Abstract: A manufacturing method of a circuit board is provided. A circuit substrate having a first surface and at least a first circuit is provided. A dielectric layer having a second surface and covering the first surface and the first circuit is formed on the circuit substrate. The dielectric layer is irradiated by a laser beam to form a first intaglio pattern, a second intaglio pattern and at least a blind via. A first conductive layer is formed in the first intaglio pattern, the second intaglio pattern and the blind via. A barrier layer and a second conductive layer are formed in the second intaglio pattern and the blind via. Parts of the second conductive layer, parts of the barrier layer and parts of the first conductive layer are removed until the second surface of the dielectric layer is exposed, so as to form a patterned circuit structure.
Abstract translation: 提供电路板的制造方法。 提供具有第一表面和至少第一电路的电路基板。 具有第二表面并覆盖第一表面的电介质层和第一电路形成在电路基板上。 电介质层被激光束照射以形成第一凹版图案，第二凹版图案和至少一个盲孔。 在第一凹版图案，第二凹版图案和盲孔中形成第一导电层。 在第二凹版图案和盲孔中形成阻挡层和第二导电层。 去除第二导电层的一部分，阻挡层的一部分和第一导电层的部分直到电介质层的第二表面露出，以形成图案化的电路结构。
-
公开(公告)号：US20160255719A1
公开(公告)日：2016-09-01
申请号：US14763074
申请日：2014-12-03
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Song SONG , Kazuyoshi NAGAYAMA
CPC classification number: H05K1/0393 , G02F1/13452 , H05K1/0248 , H05K1/0296 , H05K1/09 , H05K1/115 , H05K3/06 , H05K2201/0391 , H05K2201/09227 , H05K2201/09245 , H05K2201/09263 , H05K2201/09272 , H05K2201/10128 , H05K2201/10136
Abstract: The present disclosure discloses a wiring board used to connect a driving chip and a display panel, a flexible display panel and a display device. Signal output ends on the driving chip and signal input ends on the display panel may be arranged in pairs; and the wiring board may include fanout lines each of which is configured to connect a pair of signal output end and the signal input end. The wiring board may include a substrate; a plurality of segments of first connection lines having first resistivity is arranged on a first surface of the substrate; a plurality of segments of second connection lines having second resistivity is arranged on a second surface of the substrate opposite to the first surface. At least parts of the fanout lines are formed by connecting the first connection lines and the second connection lines.
Abstract translation: 本公开公开了一种用于连接驱动芯片和显示面板的接线板，柔性显示面板和显示装置。 驱动芯片上的信号输出结束，显示面板上的信号输入端可以成对布置; 并且布线板可以包括扇出线，每个扇出线被配置为连接一对信号输出端和信号输入端。 布线基板可以包括基板; 在基板的第一表面上布置有具有第一电阻率的第一连接线的多个段; 具有第二电阻率的第二连接线的多个段布置在与第一表面相对的基板的第二表面上。 扇出线的至少一部分通过连接第一连接线和第二连接线而形成。
-
Patent Agency Ranking
公开(公告)号：US20160242312A1
公开(公告)日：2016-08-18
申请号：US14689528
申请日：2015-04-17
Applicant: Deere & Company
Inventor： Brij N. Singh , Thomas Roan , Andrew D. Wieland , Neal D. Clements
CPC classification number: H05K1/181 , H01L23/473 , H01L2023/4043 , H01L2023/4056 , H05K1/0203 , H05K1/0265 , H05K1/111 , H05K1/184 , H05K2201/0391
Abstract: An electronic assembly comprises a semiconductor device that has conductive pads on a semiconductor first side and a metallic region on a semiconductor second side opposite the first side. A lead frame provides respective separate terminals that are electrically and mechanically connected to corresponding conductive pads. A first heat sink comprises a first component having a mating side. A portion of the mating side is directly bonded with the metallic region of the semiconductor device. A circuit board has an opening for receiving the semiconductor device. The lead frame extends outward toward the circuit board or a board first side of the circuit board.
Abstract translation: 电子组件包括在半导体第一侧上具有导电焊盘的半导体器件和与第一侧相对的半导体第二侧上的金属区域。 引线框架提供电气和机械连接到相应的导电焊盘的相应的单独的端子。 第一散热器包括具有配合侧的第一部件。 配合侧的一部分直接与半导体器件的金属区域结合。 电路板具有用于接收半导体器件的开口。 引线框向外朝向电路板或电路板的板第一侧向外延伸。
-
公开(公告)号：US20160190076A1
公开(公告)日：2016-06-30
申请号：US14980404
申请日：2015-12-28
Applicant: ROHM CO., LTD.
Inventor： Takuma SHIMOICHI , Yasuhiro KONDO
CPC classification number: H01L23/66 , H01L27/016 , H01L28/10 , H01L28/20 , H01L28/60 , H01L2223/6672 , H01L2924/0002 , H05K1/0289 , H05K1/029 , H05K1/162 , H05K1/165 , H05K1/167 , H05K3/107 , H05K3/146 , H05K2201/0317 , H05K2201/0338 , H05K2201/0376 , H05K2201/0391 , H05K2201/09263 , H05K2201/09981 , H05K2201/10181 , H05K2203/0353 , H05K2203/1338 , H01L2924/00
Abstract: A chip part includes a substrate, a first electrode and a second electrode which are formed apart from each other on the substrate and a circuit network which is formed between the first electrode and the second electrode. The circuit network includes a first passive element including a first conductive member embedded in a first trench formed in the substrate and a second passive element including a second conductive member formed on the substrate outside the first trench.
Abstract translation: 芯片部分包括在基板上彼此分开形成的基板，第一电极和第二电极以及形成在第一电极和第二电极之间的电路网络。 电路网络包括第一无源元件，第一无源元件包括嵌入在衬底中形成的第一沟槽中的第一导电构件和第二无源元件，第二无源元件包括形成在第一沟槽外部的衬底上的第二导电构件。
-
公开(公告)号：US09277648B2
公开(公告)日：2016-03-01
申请号：US14570290
申请日：2014-12-15
Applicant: FUJITSU LIMITED
Inventor： Shotaro Hamao , Yoshiaki Tamura , Toshiki Kurosawa
IPC: H05K1/11
CPC classification number: H05K1/115 , H05K1/111 , H05K3/3442 , H05K3/3452 , H05K2201/0391 , H05K2201/09381 , H05K2201/099 , Y02P70/611
Abstract: A printed wiring board having a land for surface-mounting of an electronic component, includes the land having a pair of land pieces arranged in an opposing manner, and each of the land pieces including a plurality of land portions having widths different from each other, and a coupling portion partially coupling a boundary portion between a pair of adjacent ones of the land portions.
Abstract translation: 具有用于表面安装电子部件的焊盘的印刷电路板包括具有相对布置的一对焊盘的焊盘，并且每个焊盘包括具有彼此不同的宽度的多个焊盘部分， 以及耦合部，其部分地耦合在一对相邻的所述陆部之间的边界部分。
-
公开(公告)号：US20160035710A1
公开(公告)日：2016-02-04
申请号：US14882574
申请日：2015-10-14
Applicant: Sharp Kabushiki Kaisha
Inventor： Makoto AGATANI , Toshio HATA , Tomokazu NADA , Shinya ISHIZAKI
IPC: H01L25/075 , H01L33/48 , H01L33/62
CPC classification number: H01L25/0753 , F21K9/00 , F21K9/232 , F21V23/06 , F21Y2101/00 , F21Y2105/10 , F21Y2115/10 , H01L33/483 , H01L33/52 , H01L33/54 , H01L33/62 , H01L2224/48091 , H01L2224/48137 , H01L2924/01327 , H01L2933/0066 , H05K1/11 , H05K2201/0391 , H05K2201/094 , H05K2201/0979 , H05K2201/10106 , H01L2924/00014 , H01L2924/00
Abstract: A light-emitting device capable of ensuring an electric connection between a light-emitting element and an electrode without generating any problem in practical use, by both connecting methods with a solder and a connector, and a lighting device provided with the light-emitting device are provided. The light-emitting device according to the present invention has a plurality of LED chips, and a soldering electrode land and a connector connecting electrode land electrically connected to the chips, on a ceramic substrate. The soldering electrode land is formed of a first conductive material having a function to prevent diffusion to a solder, and the connector connecting electrode land is formed of a second conductive material having a function to prevent oxidation.
-
公开(公告)号：US09253881B2
公开(公告)日：2016-02-02
申请号：US13903119
申请日：2013-05-28
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Norio Sakai , Yoshihito Otsubo
CPC classification number: H05K1/0298 , H05K1/115 , H05K3/4069 , H05K3/4691 , H05K2201/0391
Abstract: A multilayer flexible substrate includes a first structural layer including at least one resin sheet including an insulating layer, a wiring conductor provided on a principal surface of the insulating layer, and filled vias disposed in the insulating layer; and a second structural layer provided on a principal surface of a portion of the first structural layer and including at least one resin sheet including an insulating layer, a wiring conductor provided on a principal surface of the insulating layer, and a filled via provided in the insulating layer. The multilayer flexible substrate includes rigid regions and a flexible region that is more flexible than the rigid regions. In the multilayer flexible substrate, the filled via disposed in the flexible region has a higher porosity than the filled via disposed in the second structural layer.
Abstract translation: 多层柔性基板包括：第一结构层，其包括至少一个包括绝缘层的树脂片，设置在绝缘层的主表面上的布线导体和布置在绝缘层中的填充通孔; 以及第二结构层，其设置在所述第一结构层的一部分的主表面上，并且包括至少一个包括绝缘层的树脂片，设置在所述绝缘层的主表面上的布线导体和设置在所述绝缘层的主表面上的填充通孔 绝缘层。 多层柔性基板包括刚性区域和比刚性区域更柔性的柔性区域。 在多层柔性基板中，设置在柔性区域中的填充通孔具有比设置在第二结构层中的填充通孔更高的孔隙率。
-
-
-
-
-
-
-
-
-
Search Results
303
records
(took 0.017 seconds)
