公开(公告)号：US07379307B2

公开(公告)日：2008-05-27

申请号：US11466843

申请日：2006-08-24

Applicant: Hiroyuki Imamura ,  Nozomi Shimoishizaka

Inventor： Hiroyuki Imamura ,  Nozomi Shimoishizaka

IPC: H05K7/00

CPC classification number: H01L23/49838 ,  H01L23/49816 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0393 ,  H05K1/111 ,  H05K3/005 ,  H05K3/242 ,  H05K2201/09254 ,  H05K2201/09281 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/10674 ,  H05K2203/175 ,  Y02P70/611 ,  H01L2924/00

Abstract: A wiring board includes: an insulating base; a plurality of conductive wirings; and bumps formed on the conductive wirings, respectively. The conductive wirings can be connected with electrode pads of a semiconductor element via the bumps. The conductive wirings include a connection terminal portion at an end portion opposite to the other end portion where the bumps are formed, and at the connection terminal portion, the conductive wirings can be connected with an external component. The conductive wirings include first conductive wirings and second conductive wirings, on which the bumps are formed respectively at a semiconductor element mounting region. The first conductive wirings extend from the bumps to the connection terminal portion. The second conductive wirings extend beyond the semiconductor element mounting region from the bumps but do not reach the connection terminal portion. End portions of the second conductive wirings extending beyond the semiconductor element mounting region are separated electrically from the first conductive wirings by a cutting portion formed at a boundary region with the first conductive wirings. Irrespective of the state of operating electrode pads of a semiconductor element to be mounted, the bumps can be arranged at constant intervals.

Abstract translation: 布线板包括：绝缘基底; 多个导电布线; 和形成在导电配线上的凸块。 导电布线可以通过凸块与半导体元件的电极焊盘连接。 导电布线包括在与形成凸块的另一端部相对的端部处的连接端子部分，并且在连接端子部分处，导电布线可以与外部部件连接。 导电布线包括第一导电布线和第二导电布线，凸块分别形成在半导体元件安装区域上。 第一导电布线从凸块延伸到连接端子部分。 第二导电布线从凸块延伸超出半导体元件安装区域，但不到达连接端子部分。 延伸超过半导体元件安装区域的第二导电配线的端部通过与第一导电布线形成在边界区域处的切割部分与第一导电布线电隔离。 不管要安装的半导体元件的操作电极焊盘的状态如何，可以以恒定的间隔布置凸点。

公开(公告)号：US07326859B2

公开(公告)日：2008-02-05

申请号：US10735638

申请日：2003-12-16

Applicant: Cheng Siew Tay ,  Wendy Chet Ming Ngoh ,  Choi Keng Chan

Inventor： Cheng Siew Tay ,  Wendy Chet Ming Ngoh ,  Choi Keng Chan

IPC: H05K1/16

CPC classification number: H05K1/111 ,  H05K2201/09227 ,  H05K2201/09281 ,  H05K2201/09481 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/49144 ,  Y10T29/5313

Abstract: A printed circuit board includes a group of pads suitable to be soldered to a respective group of solder-balls of a device. Each pad of the group has a crack initiation point on its perimeter at a location where cracks in a solder-ball are anticipated to start after that solder-ball is soldered to that pad. For a pad of that group having a microvia located therein, a center of that microvia is located farther than a center of that pad from its crack initiation point. For a pad of that group having a trace merging along a portion of its perimeter, that portion does not include a vicinity of that crack initiation point.

Abstract translation: 印刷电路板包括适合于焊接到装置的相应组焊球的一组焊盘。 该组的每个焊盘在其焊接球被焊接到该焊盘之后预期在焊球上的裂纹开始的位置处具有在其周边上的裂纹起始点。 对于具有位于其中的微孔的该组的垫，该微孔的中心位于比该垫的中心从其裂纹起始点更远的位置。 对于具有沿着其周边的一部分的轨迹合并的该组的焊盘，该部分不包括该裂纹起始点的附近。

公开(公告)号：US20070015378A1

公开(公告)日：2007-01-18

申请号：US11358057

申请日：2006-02-22

Applicant: Chin-Mei Huang

Inventor： Chin-Mei Huang

IPC: H05K1/00

CPC classification number: H05K1/118 ,  H05K3/28 ,  H05K3/4015 ,  H05K2201/09281 ,  H05K2201/0979

Abstract: A flexible printed circuit board includes a flexible substrate, which has a bonding zone, a folding zone, and a folding line between the bonding zone and the folding zone, two electrically conductive contacts respectively located at the bonding zone, two lead wires each having an extension portion respectively electrically connected to the electrically conductive contacts and arranged in parallel to the folding line and a connecting portion extending integrally from the extension portion toward the folding zone, and a protective layer covered on the flexible substrate over the lead wires. The protective layer has openings corresponding to the electrically conductive contacts.

Abstract translation: 柔性印刷电路板包括柔性基板，其具有接合区域，折叠区域和接合区域和折叠区域之间的折叠线，分别位于接合区域处的两个导电触点，每个具有一个 延伸部分分别电连接到导电触头并且平行于折叠线布置，并且从延伸部分朝向折叠区域整体延伸的连接部分以及覆盖在引线上的柔性基板上的保护层。 保护层具有对应于导电触点的开口。

公开(公告)号：US07056571B2

公开(公告)日：2006-06-06

申请号：US10739156

申请日：2003-12-19

Applicant: Satoru Tomekawa ,  Tetsuyoshi Ogura ,  Hiroyoshi Tagi

Inventor： Satoru Tomekawa ,  Tetsuyoshi Ogura ,  Hiroyoshi Tagi

IPC: B32B3/00

CPC classification number: B32B17/04 ,  B32B15/04 ,  H05K1/0237 ,  H05K1/0366 ,  H05K2201/029 ,  H05K2201/09281 ,  Y10S428/901 ,  Y10T428/24917

Abstract: There is provided a wiring board including an insulation substrate and a wiring layer which is located on at least one main surface of the insulation substrate, wherein the insulation substrate comprises a woven fabric which is made of yarns and an organic resin with which the woven fabric is impregnated, and at least one wiring of wirings which form the wiring layer extends over the woven fabric except for top portions of the yarns.

Abstract translation: 提供一种布线板，其包括绝缘基板和位于绝缘基板的至少一个主表面上的布线层，其中绝缘基板包括由纱线制成的机织织物和机织织物 并且形成布线层的布线的至少一个布线在除了纱线的顶部之外的机织织物上延伸。

公开(公告)号：US20050230829A1

公开(公告)日：2005-10-20

申请号：US11081658

申请日：2005-03-17

Applicant: Yuji Watanabe ,  Mitsuaki Katagiri ,  Hisashi Tanie ,  Atsushi Nakamura ,  Tomohiko Sato

Inventor： Yuji Watanabe ,  Mitsuaki Katagiri ,  Hisashi Tanie ,  Atsushi Nakamura ,  Tomohiko Sato

IPC: H05K1/02 ,  H01L21/56 ,  H01L21/60 ,  H01L23/12 ,  H01L23/31 ,  H01L23/48 ,  H01L25/065 ,  H01L25/10 ,  H01L25/18 ,  H05K1/11 ,  H05K3/34

CPC classification number: H05K1/111 ,  H01L21/563 ,  H01L23/3114 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73203 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K2201/09281 ,  H05K2201/094 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device is provided with a semiconductor package 2 and a package substrate 5 having lands 8 that electrically connect by way of solder bumps 4 to the semiconductor package 2. A plurality of columns, in each of which a multiplicity of lands 8 are arranged, are formed on the package substrate 5. At least one of the lands 8 that make up columns that are located closest to each of the main sides that make up the outer edges of the semiconductor package has an interconnection 9 that extends from the land 8 along the surface of the package substrate. The interconnection 9 is formed such that the part that contacts the land 8 is located closer to a line that passes through the center of the land 8 and that is orthogonal to a line that connects the center of the land 8 with the center of the semiconductor package 2 than to the line that connects the center of the land 8 with the center of the semiconductor package 2.

Abstract translation: 半导体器件设置有半导体封装2和封装衬底5，封装衬底5具有通过焊料凸点4电连接到半导体封装2的焊盘8。 在封装基板5上形成有多个列，其中布置有多个焊盘8。 构成最靠近构成半导体封装的外边缘的每个主侧的列的焊盘8中的至少一个具有从焊盘8沿着封装基板的表面延伸的互连9。 互连9形成为使得接触焊盘8的部分更靠近通过焊盘8的中心的线并且与连接焊盘8的中心与半导体的中心的线垂直的线 封装2，而不是将焊盘8的中心与半导体封装2的中心连接的线。

公开(公告)号：US20050128721A1

公开(公告)日：2005-06-16

申请号：US10735638

申请日：2003-12-16

Applicant: Cheng Tay ,  Wendy Chet Ngoh ,  Choi Chan

Inventor： Cheng Tay ,  Wendy Chet Ngoh ,  Choi Chan

IPC: H05K1/11 ,  H05K7/06

CPC classification number: H05K1/111 ,  H05K2201/09227 ,  H05K2201/09281 ,  H05K2201/09481 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/49144 ,  Y10T29/5313

Abstract: A printed circuit board includes a group of pads suitable to be soldered to a respective group of solder-balls of a device. Each pad of the group has a crack initiation point on its perimeter at a location where cracks in a solder-ball are anticipated to start after that solder-ball is soldered to that pad. For a pad of that group having a microvia located therein, a center of that microvia is located farther than a center of that pad from its crack initiation point. For a pad of that group having a trace merging along a portion of its perimeter, that portion does not include a vicinity of that crack initiation point.

Abstract translation: 印刷电路板包括适合于焊接到装置的相应组焊球的一组焊盘。 该组的每个焊盘在其焊接球被焊接到该焊盘之后预期在焊球上的裂纹开始的位置处具有在其周边上的裂纹起始点。 对于具有位于其中的微孔的该组的垫，该微孔的中心位于比该垫的中心更远离其裂纹起始点。 对于具有沿着其周边的一部分的轨迹合并的该组的焊盘，该部分不包括该裂纹起始点的附近。

公开(公告)号：US20030060062A1

公开(公告)日：2003-03-27

申请号：US10247393

申请日：2002-09-19

Applicant: Olympus Optical Co., Ltd.

Inventor： Sumito Honda ,  Takashi Suzuki

IPC: H05K001/00

CPC classification number: H05K1/111 ,  H05K1/189 ,  H05K3/281 ,  H05K3/3442 ,  H05K2201/09254 ,  H05K2201/09281 ,  H05K2201/0979 ,  H05K2201/10636 ,  Y02P70/611

Abstract: On the surface of a flexible printed circuit board according to the present invention, at least one conductive land formed of a conductive pattern for mounting a component thereon which is to be mounted on the flexible printed circuit board, at least one first conductor line lead formed of another conductive pattern which extends from the conductor land and which forms an electrical connection of the conductor land, at least one second conductor line lead formed of another conductive pattern which extends in a direction orthogonal to the first conductor line lead and which extends from the conductor land for forming an electrical connection of the conductor land, and at least one semi-circular conductor line for electrically connecting the end of the first conductor line lead and the end of the second conductor line lead are formed.

Abstract translation: 在根据本发明的柔性印刷电路板的表面上，由用于安装其上的部件的导电图案形成的至少一个导电接合面将安装在柔性印刷电路板上，形成至少一个第一导体线引线 从导体焊盘延伸并且形成导体焊盘的电连接的另一个导电图案，至少一个第二导线引线，其由与第一导线引线正交的方向延伸的另一个导体图形形成， 形成用于形成导体焊盘的电连接的导体焊盘，以及用于电连接第一导线引线的端部和第二导线引线的端部的至少一个半圆导体线。

公开(公告)号：US20020014683A1

公开(公告)日：2002-02-07

申请号：US09912887

申请日：2001-07-25

Applicant: NEC Corporation

Inventor： Michihiko Ichinose

IPC: H01L023/495

CPC classification number: H05K3/3436 ,  H01L21/4853 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/111 ,  H05K3/28 ,  H05K2201/09263 ,  H05K2201/09281 ,  H05K2201/10734 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device includes an interposing substrate having a top surface mounting thereon a semiconductor chip and a bottom surface mounting thereon a solder ball islands. Chip electrodes of the semiconductor chip are connected to the solder ball islands through a top interconnect pattern, via holes and a bottom interconnect pattern. The second interconnect pattern has a solder-flow damping/stopping pattern in the vicinity of the solder ball islands for stopping the solder from flowing onto the bottom interconnect pattern upon melting.

Abstract translation: 半导体器件包括其上安装有半导体芯片的顶表面和其上安装有焊球岛的底表面的中介衬底。 半导体芯片的芯片电极通过顶部互连图案，通孔和底部互连图案连接到焊球岛。 第二互连图案在焊球附近具有焊料流阻尼/停止图案，用于在熔化时阻止焊料流到底部互连图案上。

公开(公告)号：US11831208B2

公开(公告)日：2023-11-28

申请号：US17232523

申请日：2021-04-16

Applicant: Infineon Technologies AG

Inventor： Udo Ausserlechner

IPC: G01B7/14 ,  G01B7/30 ,  H01F5/00 ,  H02K11/225 ,  H05K1/16 ,  H05K1/18 ,  H05K1/02 ,  H02K3/26 ,  G01D5/20 ,  G01B7/00 ,  G01B7/004

CPC classification number: H02K11/225 ,  G01D5/2046 ,  G01D5/2053 ,  G01D5/2066 ,  G01D5/2073 ,  H02K3/26 ,  H05K1/0216 ,  H05K1/165 ,  H05K1/181 ,  G01B7/003 ,  G01B7/004 ,  H02K2203/03 ,  H05K2201/09281 ,  H05K2201/10151 ,  H05K2201/10492 ,  H05K2201/10727 ,  H05K2201/10734

Abstract: A device includes a substrate with an excitation coil configured to generate a magnetic field in reaction to an input signal fed in, and with a pickup coil arrangement configured to generate an output signal in reaction to a magnetic field. The excitation coil includes one or more turns arranged around the pickup coil arrangement in a ring-shaped manner in a plan view of the substrate plane. The device further includes a chip package comprising at least one electrical connection connected to the pickup coil arrangement by means of a signal-carrying conductor. In accordance with the concept described herein, the chip package is positioned on the substrate in such a way that the signal-carrying conductor and the one or more turns of the excitation coil do not overlap in a plan view of the substrate plane.

公开(公告)号：US20180329253A1

公开(公告)日：2018-11-15

申请号：US16042401

申请日：2018-07-23

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Chong-Guk Lee ,  Joo-Yeon Won ,  Se-Hul Jang ,  Su-Mi Moon ,  Dong-Wook Lee

IPC: G02F1/1345 ,  H01L23/498 ,  H05K1/02 ,  H01L27/12 ,  H05K1/18 ,  H01L23/00

CPC classification number: G02F1/13452 ,  H01L23/4985 ,  H01L24/16 ,  H01L24/48 ,  H01L27/124 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/81191 ,  H01L2924/00014 ,  H01L2924/15159 ,  H05K1/028 ,  H05K1/189 ,  H05K2201/09227 ,  H05K2201/09272 ,  H05K2201/09281 ,  H05K2201/10674 ,  H01L2224/45099

Abstract: A chip on film package includes a base substrate, an input line, an integrated circuit (IC) chip and an output line. The input line is disposed on the base substrate. The IC chip is electrically connected to the input line. The output line includes a main output and a sub output line. The main output line is electrically connected to the IC chip and extends in a first direction from the IC chip. The sub output line is electrically connected to the IC chip. The sub output line includes at least six bending parts, and is extended in the first direction.