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    PRIMITIVE BLOCK GENERATOR FOR GRAPHICS PROCESSING SYSTEMS
    81.
    发明公开
    PRIMITIVE BLOCK GENERATOR FOR GRAPHICS PROCESSING SYSTEMS 审中-公开

    公开(公告)号：US20240104833A1

    公开(公告)日：2024-03-28

    申请号：US18525756

    申请日：2023-11-30

    Applicant: Imagination Technologies Limited

    Inventor： Xile Yang ,  Robert Brigg ,  John W. Howson

    IPC: G06T15/40 ,  G06T1/60 ,  G06T15/00

    CPC classification number: G06T15/40 ,  G06T1/60 ,  G06T15/005

    Abstract: Methods and primitive block generators for generating primitive blocks in a graphics processing system. The methods include receiving transformed position data for a current primitive, the transformed position data indicating a position of the current primitive in rendering space; determining a distance between the position of the current primitive and a position of a current primitive block based on the transformed position data for the current primitive; determining whether to add the current primitive to the current primitive block based on the distance and a fullness of the current primitive block; in response to determining that the current primitive is to be added to the current primitive block, adding the current primitive to the current primitive block; and in response to determining that the current primitive is not to be added to the current primitive block, flushing the current primitive block and adding the current primitive to a new current primitive block.

    Dedicated Ray Memory for Ray Tracing in Graphics Systems
    85.
    发明公开
    Dedicated Ray Memory for Ray Tracing in Graphics Systems 审中-公开

    公开(公告)号：US20230419588A1

    公开(公告)日：2023-12-28

    申请号：US18244441

    申请日：2023-09-11

    Applicant: Imagination Technologies Limited

    Inventor： John W. Howson ,  Steven J. Clohset ,  Ali Rabbani

    IPC: G06T15/06 ,  G06T1/60 ,  G06T1/20

    CPC classification number: G06T15/06 ,  G06T1/60 ,  G06T1/20

    Abstract: A ray tracing unit implemented in a graphics rendering system includes processing logic configured to perform ray tracing operations on rays, a dedicated ray memory coupled to the processing logic and configured to store ray data for rays to be processed by the processing logic, an interface to a memory system, and control logic configured to manage allocation of ray data to either the dedicated ray memory or the memory system. Core ray data for rays to be processed by the processing logic is stored in the dedicated ray memory, and at least some non-core ray data for the rays is stored in the memory system. This allows core ray data for many rays to be stored in the dedicated ray memory without the size of the dedicated ray memory becoming too wasteful when the ray tracing unit is not in use.

    Transformed Geometry Data Cache for Graphics Processing Systems
    86.
    发明公开
    Transformed Geometry Data Cache for Graphics Processing Systems 审中-公开

    公开(公告)号：US20230298262A1

    公开(公告)日：2023-09-21

    申请号：US18202933

    申请日：2023-05-28

    Applicant: Imagination Technologies Limited

    Inventor： Robert Brigg ,  John W. Howson ,  Xile Yang

    IPC: G06T15/40 ,  G06T15/00 ,  G06T1/60

    CPC classification number: G06T15/40 ,  G06T15/005 ,  G06T1/60

    Abstract: A tag buffer implements a tag buffer stage of a rasterization phase in a tile-based rendering graphics processing system having a rendering space sub-divided into a plurality of tiles to which primitives can be associated. A buffer stores an identifier that identifies a visible primitive fragment at each sample position of a tile of the plurality of tiles. A look-up table stores an entry for transformed primitive blocks that indicates whether the tag buffer has received information identifying a primitive fragment associated with that transformed primitive block. The tag buffer receives information identifying primitive fragments that have survived a depth test, updates the buffer to indicate that an identified primitive fragment is the visible primitive fragment at the associated sample position, updates the look-up table to indicate which transformed primitive blocks the identified primitive fragments are associated with, and in response to flushing the contents of the buffer, compares the flushed contents of the buffer to the look-up table to thereby identify transformed primitive blocks that did not survive the tag buffer stage.

    HYBRID HIERARCHY OF BOUNDING AND GRID STRUCTURES FOR RAY TRACING
    87.
    发明公开
    HYBRID HIERARCHY OF BOUNDING AND GRID STRUCTURES FOR RAY TRACING 审中-公开

    公开(公告)号：US20230162430A1

    公开(公告)日：2023-05-25

    申请号：US18100551

    申请日：2023-01-23

    Applicant: Imagination Technologies Limited

    Inventor： Gregory Clark ,  John W. Howson ,  Justin DeCell ,  Steven J. Clohset

    IPC: G06T15/06 ,  G06F30/327 ,  G06T17/00

    CPC classification number: G06T15/06 ,  G06F30/327 ,  G06T17/005 ,  G06T2210/12 ,  G06T2210/21 ,  G06T2210/52

    Abstract: Methods and ray tracing units are provided for performing intersection testing for use in rendering an image of a 3-D scene. A hierarchical acceleration structure may be traversed by traversing one or more upper levels of nodes of the hierarchical acceleration structure according to a first traversal technique, the first traversal technique being a depth-first traversal technique; and traversing one or more lower levels of nodes of the hierarchical acceleration structure according to a second traversal technique, the second traversal technique not being a depth-first traversal technique. Results of traversing the hierarchical acceleration structure are used for rendering the image of the 3-D scene. The upper levels of the acceleration structure may be defined according to a spatial subdivision structure, whereas the lower levels of the acceleration structure may be defined according to a bounding volume structure.

    Hidden culling in tile-based computer generated images
    88.
    发明授权
    Hidden culling in tile-based computer generated images 有权

    公开(公告)号：US11657565B2

    公开(公告)日：2023-05-23

    申请号：US17515352

    申请日：2021-10-29

    Applicant: Imagination Technologies Limited

    Inventor： Xile Yang ,  John W. Howson ,  Simon Fenney

    IPC: G06T15/40 ,  G06T15/00

    CPC classification number: G06T15/405 ,  G06T15/005

    Abstract: A method and system is provided for culling hidden objects in a tile-based graphics system before they are indicated in a display list for a tile. A rendering space is divided into a plurality of regions which may for example be a plurality of tiles or a plurality of areas into which one or more tiles are divided. Depth thresholds for the regions, which are used to identify hidden objects for culling, are updated when an object entirely covers a region and in dependence on a comparison between a depth value for the object and the depth threshold for the region. For example, if the depth threshold is a maximum depth threshold, the depth threshold may be updated if an object entirely covers the tile and the maximum depth value of the object is less than the maximum depth threshold.

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