公开(公告)号：US10942880B2

公开(公告)日：2021-03-09

申请号：US16236471

申请日：2018-12-29

Applicant: Intel Corporation

Inventor： Amit Kumar Srivastava ,  Asad Azam

IPC: G06F13/40 ,  G06F13/16

Abstract: An integrated circuit for monitoring components of the integrated circuit, comprising: a resource monitoring circuit configured to: track activity factors for a plurality of components of the integrated circuit; evaluate the activity factors for each of the plurality of components; determine whether an activity factor for a particular component of the plurality of components exceeds a threshold; and transmit, from the resource monitoring circuit, a signal to a software element, causing the software element to deactivate the particular component and activate an alternate component, when the activity factor for the particular component exceeds the threshold and the alternate component is available to substitute for the particular component.

公开(公告)号：US10938200B2

公开(公告)日：2021-03-02

申请号：US15443161

申请日：2017-02-27

Applicant: INTEL CORPORATION

Inventor： Amit Kumar Srivastava ,  Karthik Ns ,  Raghavendra Devappa Sharma ,  Dharmaray Nedalgi ,  Prasad Bhilawadi

IPC: G06K19/00 ,  H02H3/18 ,  G06F1/26 ,  G06F1/3212 ,  H04B1/38 ,  H04L25/02

Abstract: Described is an apparatus which comprises: one or more signal lines; a transceiver coupled to the one or more signal lines; and a bias generation circuit to provide one or more bias voltages for the transceiver to tri-state the transceiver according to signal attributes of the one or more signal lines.

公开(公告)号：US20200379530A1

公开(公告)日：2020-12-03

申请号：US16943155

申请日：2020-07-30

Applicant: Intel Corporation

Inventor： Amit Kumar Srivastava ,  Rao Jagannadha Rapeta ,  Asad Azam

IPC: G06F1/20 ,  G05B15/02

Abstract: The disclosed embodiments relate to methods, systems and apparatus for dynamic temperature aware functional safety. The disclosed embodiments provide adaptive techniques to track extended dynamic temperature range of a System-on-Chip (SOC) and automatically tune critical IP components of the SOC so that system can operate reliably even at high temperatures. The disclosed embodiments relax the overdesign of the SOC components by reusing existing components such as a ring oscillator to determine temperature at different regions of the SOC. In one embodiment, the disclosed principles use a Calibrated Ring Oscillator (CRO) temperature sensors. The CRO-based temperature sensors provide fast temperature measurement suitable for detecting dynamic temperature ranges and temperature rate of change. The CROs are existing on the SOC and do not require addition of additional sensors.

公开(公告)号：US10769084B2

公开(公告)日：2020-09-08

申请号：US15474117

申请日：2017-03-30

Applicant: Intel Corporation

Inventor： Kenneth P. Foust ,  Duane G. Quiet ,  Amit Kumar Srivastava

IPC: G06F13/24 ,  G06F13/42

Abstract: Embodiments of the present disclosure may relate to a host controller that includes processing circuitry to identify an inter-integrated circuit (I2C) out-of-band interrupt (OBI) received on a general purpose input-output (GPIO) pin from an I2C device that is unable to generate an improved inter-integrated circuit (I3C) bus an I3C in-band interrupt (IBI). The processing circuitry may further generate, based on the I2C OBI, an I3C IBI that includes information related to the I2C OBI. The host controller may further include transmission circuitry to transmit the I3C IBI on an I3C bus. Other embodiments may be described and/or claimed.

公开(公告)号：US10355690B2

公开(公告)日：2019-07-16

申请号：US15279273

申请日：2016-09-28

Applicant: Intel Corporation

Inventor： Siti Suhaila Mohd Yusof ,  Amit Kumar Srivastava ,  Lay Hock Khoo ,  Chin Boon Tear

IPC: H03K19/00 ,  H03K19/003 ,  G06F1/06 ,  G06F1/28

Abstract: An apparatus is provided which comprises: a data sampler coupled to an output of a driver, wherein the data sampler is to sample data and to compare it with a first threshold voltage and a second threshold voltage, and wherein the data sampler is to generate an up or down indicator according to comparing the data with the first and second threshold voltages; and logic coupled to the data sampler, wherein the logic is to receive the up or down indicator and to increment or decrement a number of already DC compensated impedance legs of the driver according to the up or down indicator.

公开(公告)号：US10339093B2

公开(公告)日：2019-07-02

申请号：US15083518

申请日：2016-03-29

Applicant: Intel Corporation

Inventor： Amit Kumar Srivastava

IPC: G06F13/42 ,  G06F13/40 ,  G06F13/38

Abstract: An example system for side band communication can include a processor, a system-on-chip (SOC), and a repeater communicatively coupled to the processor and the SOC. The repeater can receive packets from a first transceiver. The repeater can also detect a pattern in the packets to identify a guest protocol. The repeater can further send the packets from the first transceiver to the SOC via a second transceiver based on the identified guest protocol.

公开(公告)号：US20190187929A1

公开(公告)日：2019-06-20

申请号：US15844964

申请日：2017-12-18

Applicant: Intel Corporation

Inventor： Amit Kumar Srivastava ,  Sriram Balasubrahmanyam

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0613 ,  G06F3/0679

Abstract: Some embodiments include apparatuses and methods using the apparatuses. Some of the apparatuses include a device that includes an interface for communication with a host. The device includes components that can operate during at least one of read link training and duty cycle distortion compensation operation.

公开(公告)号：US20190087378A1

公开(公告)日：2019-03-21

申请号：US15706902

申请日：2017-09-18

Applicant: Intel Corporation

Inventor： Amit Kumar Srivastava ,  Kenneth P. Foust

IPC: G06F13/42 ,  G06F13/38 ,  G06F1/26

Abstract: In one embodiment, an apparatus includes an input/output (I/O) circuit to communicate information at a selected voltage via an interconnect to which a plurality of devices may be coupled, and a host controller to couple to the interconnect. The host controller may include a supply voltage policy control circuit to initiate a supply voltage policy exchange with a first device to obtain a first supply voltage capability of the first device and to cause the I/O circuit and the first device to be configured to communicate via the interconnect at a first supply voltage based on the first supply voltage capability. Other embodiments are described and claimed.

公开(公告)号：US20190004590A1

公开(公告)日：2019-01-03

申请号：US15638049

申请日：2017-06-29

Applicant: Intel Corporation

Inventor： Amit Kumar Srivastava ,  Chenchu Punnarao Bandi

IPC: G06F1/32 ,  G06F13/42 ,  G06F13/40

Abstract: Apparatus for managing high speed Universal Serial Bus 2.0 (USB2) communications is presented. The apparatus may include a combination differential difference detector to receive first and second input signals, the combination differential difference detector to, in a first mode: sense a first voltage difference between the first and second input signals and output a squelch signal when the first voltage difference is less than or equal to a pre-defined value. The combination differential difference detector is to, in a second mode, sense a second voltage difference between the first and second input signals and output a disconnect signal when the second voltage difference is greater than or equal to a pre-defined value. Related methods may also be disclosed.

公开(公告)号：US10128248B1

公开(公告)日：2018-11-13

申请号：US15650271

申请日：2017-07-14

Applicant: Intel Corporation

Inventor： Karthik Ns ,  Dharmaray Nedalgi ,  Vani Deshpande ,  Leonhard Heiss ,  Amit Kumar Srivastava

IPC: H01L29/76 ,  H01L27/105 ,  H01L23/58 ,  H01L23/00

Abstract: An apparatus is provided which comprises: a stack of transistors of a same conductivity type, the stack including a first transistor and a second transistor coupled in series and having a common node; and a feedback transistor of the same conductivity type coupled to the common node and a gate terminal of the first transistor of the stack.