公开(公告)号：US20120268895A1

公开(公告)日：2012-10-25

申请号：US13499378

申请日：2010-10-07

Applicant: Jean-Michel Morelle ,  Ky Lim Tan ,  Laurent Vivet ,  Sandra Dimelli ,  Stéphane Thomelin ,  Hervé Lorin

Inventor： Jean-Michel Morelle ,  Ky Lim Tan ,  Laurent Vivet ,  Sandra Dimelli ,  Stéphane Thomelin ,  Hervé Lorin

IPC: H05K7/20 ,  H05K3/00

CPC classification number: H05K1/0206 ,  H01L23/373 ,  H01L23/3733 ,  H01L23/3735 ,  H01L2224/4846 ,  H01L2224/48472 ,  H05K1/056 ,  H05K1/09 ,  H05K3/0061 ,  H05K2201/0323 ,  H05K2201/10166 ,  Y10T29/49155

Abstract: Said electronic power module (10) includes: a stack (14) comprising a metal layer forming an electric circuit (26) and intended for supporting an electronic power component (18) such as a semiconductor; a metal body forming a heat drain (20); and a dielectric material layer (22) forming an electric insulator and inserted between the electric circuit (26) and the heat drain (20). The stack (14) includes a composite material body (24) having a carbon-charged metal matrix. The carbon charge is between 20 and 60 volume percent. Said composite body (24) is inserted between an area of the electric circuit (26) and the electric insulator (22), said area being intended for supporting the electronic power component (18).

Abstract translation: 所述电子功率模块（10）包括：堆叠（14），包括形成电路（26）的金属层并且用于支撑诸如半导体的电子功率部件（18）; 形成散热器（20）的金属体; 以及形成电绝缘体并插入在电路（26）和散热器（20）之间的电介质材料层（22）。 叠层（14）包括具有带碳金属基体的复合材料体（24）。 碳电荷为20至60体积％。 所述复合体（24）插入在电路（26）的区域和电绝缘体（22）之间，所述区域用于支撑电子功率部件（18）。

公开(公告)号：US20120138339A1

公开(公告)日：2012-06-07

申请号：US13390158

申请日：2010-08-04

Applicant: Leander Dittmann

Inventor： Leander Dittmann

IPC: H05K1/00 ,  H01K3/10

CPC classification number: B26F1/28 ,  H05K3/0017 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/105 ,  H05K3/4038 ,  H05K2201/0323 ,  H05K2203/105 ,  H05K2203/1115 ,  H05K2203/1136 ,  Y10T29/49165

Abstract: The present invention relates to a method of producing an electrically-conducting via in a substrate and to a substrate produced thereby. The method comprises the steps: a) providing a substrate made of at least one electrically insulating material (1), b) placing said substrate between two electrodes (3, 3′), said two electrodes being connected to a user-controlled voltage source (4), c) appling a voltage to said substrate, d) causing a dielectric breakdown and energy dissipation between said two electrodes through said substrate by locally or globally increasing the electrical conductivity of said substrate, wherein, in step d), a modification of said at least one electrically insulating material into an electrically conducting material occurs, thereby generating an electrically conducting via (6). In particular, in one embodiment, the present invention relates to a substrate, such as a printed circuit board having one or several metal-free electrically conducting vias.

Abstract translation: 本发明涉及一种在衬底中制造导电通孔的方法及其制造的衬底。 该方法包括以下步骤：a）提供由至少一个电绝缘材料（1）制成的衬底，b）将所述衬底放置在两个电极（3,3'）之间，所述两个电极连接到用户控制的电压源 （4），c）向所述衬底施加电压，d）通过局部地或全面地增加所述衬底的导电性，在所述两个电极之间通过所述衬底造成电介质击穿和能量耗散，其中在步骤d）中， 所述至少一个电绝缘材料变成导电材料，从而产生导电通孔（6）。 特别地，在一个实施例中，本发明涉及一种基板，例如具有一个或多个无金属导电通孔的印刷电路板。

公开(公告)号：US08193455B2

公开(公告)日：2012-06-05

申请号：US12345760

申请日：2008-12-30

Applicant: Ernesto E. Marinero

Inventor： Ernesto E. Marinero

IPC: E21B10/64 ,  E21B10/66

CPC classification number: H05K1/09 ,  H01L23/53276 ,  H01L2924/0002 ,  H05K3/107 ,  H05K2201/0323 ,  Y10S977/712 ,  Y10S977/72 ,  Y10S977/721 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2924/00

Abstract: An electrical circuit structure employing graphene as a charge carrier transport layer. The structure includes a plurality of graphene layers. Electrical contact is made with one of the layer of the plurality of graphene layers, so that charge carriers travel only through that one layer. By constructing the active graphene layer within or on a plurality of graphene layers, the active graphene layer maintains the necessary planarity and crystalline integrity to ensure that the high charge carrier mobility properties of the active graphene layer remain intact.

Abstract translation: 使用石墨烯作为电荷载流子传输层的电路结构。 该结构包括多个石墨烯层。 电接触由多个石墨烯层中的一个层制成，使得电荷载流子仅行进该层。 通过在多个石墨烯层之内或之上构建活性石墨烯层，活性石墨烯层保持必要的平面性和晶体完整性，以确保活性石墨烯层的高电荷载流子迁移率性质保持不变。

公开(公告)号：US08166647B2

公开(公告)日：2012-05-01

申请号：US12352090

申请日：2009-01-12

Applicant: Jun-Oh Hwang ,  Jee-Soo Mok ,  Jun-Heyoung Park ,  Kyung-Ah Lee ,  Eung-Suek Lee

Inventor： Jun-Oh Hwang ,  Jee-Soo Mok ,  Jun-Heyoung Park ,  Kyung-Ah Lee ,  Eung-Suek Lee

IPC: H05K3/02

CPC classification number: B82Y10/00 ,  H05K1/0206 ,  H05K1/056 ,  H05K1/183 ,  H05K3/005 ,  H05K3/4069 ,  H05K3/4608 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/026 ,  H05K2201/0323 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2203/0108 ,  H05K2203/1131 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165

Abstract: A printed circuit board and a method for manufacturing the printed circuit board are disclosed. The method can include; providing an insulated layer, in which a first metal layer is formed on one side of the insulated layer; forming a groove on the insulated layer; forming a metallic substance on an inner side of the groove and on another side of the insulated layer; and forming a first circuit pattern on at least one of one side of the insulated layer and the metallic substance formed on the groove by removing a portion of the first metal layer. The present invention provides the printed circuit board having a high efficiency of heat emission by disposing a heat sink in direct contact with a board and the method of manufacturing the printed circuit board.

Abstract translation: 公开了印刷电路板和印刷电路板的制造方法。 该方法可以包括 提供绝缘层，其中第一金属层形成在绝缘层的一侧上; 在绝缘层上形成凹槽; 在所述槽的内侧和所述绝缘层的另一侧上形成金属物质; 以及通过去除所述第一金属层的一部分，在所述绝缘层的一侧中的至少一个和形成在所述凹槽上的所述金属物质之间形成第一电路图案。 本发明通过设置与基板直接接触的散热器和印刷电路板的制造方法来提供具有高发热效率的印刷电路板。

公开(公告)号：US08161636B2

公开(公告)日：2012-04-24

申请号：US12272048

申请日：2008-11-17

Applicant: Kishio Yokouchi ,  Hideaki Yoshimura ,  Katsuya Fukase

Inventor： Kishio Yokouchi ,  Hideaki Yoshimura ,  Katsuya Fukase

IPC: H01K3/10

CPC classification number: H05K1/0366 ,  H05K3/445 ,  H05K3/4641 ,  H05K2201/0278 ,  H05K2201/029 ,  H05K2201/0323 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as the thermal expansion coefficient of the circuit board. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs which include first fibers that conduct electricity and second fibers that do not conduct electricity, which have the second fibers disposed at positions where plated through holes will pass through, and which are impregnated with resin; a step of forming through holes at positions in the core portion where the second fibers are disposed; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the first fibers and thereby produce a core substrate.

Abstract translation: 电路板具有以细间距布置的电镀通孔，并满足与电路板的热膨胀系数等特性相关的要求。 一种制造电路板的方法包括：通过热压接预浸料形成芯部的步骤，该预浸料包括导电的第一纤维和不导电的第二纤维，其中第二纤维布置在镀通孔的位置 通过，并用树脂浸渍; 在设置有第二纤维的芯部中的位置形成通孔的工序; 以及在通孔的内表面上形成导电层的步骤，在不干扰第一纤维的位置处形成电镀通孔，从而制造芯基板。

公开(公告)号：US20120077039A1

公开(公告)日：2012-03-29

申请号：US13235040

申请日：2011-09-16

Applicant: Kyu Sang LEE ,  Sang Su Hong ,  Hyun Ho Lim ,  Hwa Young Lee ,  Jae Choon Cho

Inventor： Kyu Sang LEE ,  Sang Su Hong ,  Hyun Ho Lim ,  Hwa Young Lee ,  Jae Choon Cho

IPC: B32B27/38 ,  B32B19/00 ,  B28B1/14

CPC classification number: H05K1/036 ,  H05K1/0373 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0323 ,  H05K2201/068 ,  Y10T428/31511

Abstract: Provided is a polymer resin composition for manufacturing an insulating film for manufacture of a printed circuit board. The polymer resin composition includes polymer resins and graphene for linking the polymer resins with larger attraction than Van Deer Waals's force of the polymer resins.

Abstract translation: 提供一种用于制造印刷电路板制造绝缘膜的聚合物树脂组合物。 聚合物树脂组合物包括聚合物树脂和石墨烯，用于将聚合物树脂与聚合物树脂的Van Deer Waals's力相比具有更大的吸引力。

公开(公告)号：US20120043691A1

公开(公告)日：2012-02-23

申请号：US13266386

申请日：2010-04-27

Applicant: Takeshi Uekido

Inventor： Takeshi Uekido

IPC: B29C47/06 ,  B32B7/02 ,  B29C39/20 ,  B32B27/06

CPC classification number: H05K1/0346 ,  C08J7/047 ,  C08J2379/08 ,  C08J2479/08 ,  H01L23/145 ,  H01L23/4985 ,  H01L24/50 ,  H01L24/86 ,  H01L2924/01004 ,  H01L2924/01012 ,  H01L2924/0102 ,  H01L2924/01077 ,  H01L2924/12044 ,  H01L2924/14 ,  H05K1/0274 ,  H05K1/036 ,  H05K1/0373 ,  H05K1/0393 ,  H05K2201/0112 ,  H05K2201/0209 ,  H05K2201/0323 ,  H05K2201/2054 ,  Y10T428/2495 ,  Y10T428/31721 ,  H01L2924/00

Abstract: A multilayered polyimide film including a polyimide layer (b), and a pigment-containing polyimide layer (a) stacked on one surface or both surfaces of the polyimide layer (b), wherein the polyimide layer (b) is formed of a polyimide including an aromatic tetracarboxylic acid unit containing a 3,3′,4,4′-biphenyltetracarboxylic acid unit in an amount of 70 to 100 mol %, and an aromatic diamine unit containing a p-phenylenediamine unit in an amount of 70 to 100 mol %.

Abstract translation: 一种层叠在聚酰亚胺层（b）的一面或两面上的聚酰亚胺层（b）和含有颜料的聚酰亚胺层（a）的多层聚酰亚胺膜，其中，聚酰亚胺层（b）由聚酰亚胺 含有70〜100摩尔％的3,3'，4,4'-联苯四羧酸单元的芳香族四羧酸单元和含有70〜100摩尔％的对苯二胺单元的芳香族二胺单元， 。

公开(公告)号：US08119925B2

公开(公告)日：2012-02-21

申请号：US12390010

申请日：2009-02-20

Applicant: Hideaki Yoshimura ,  Kenji Iida ,  Tomoyuki Abe ,  Yasutomo Maehara ,  Takashi Nakagawa ,  Shin Hirano

Inventor： Hideaki Yoshimura ,  Kenji Iida ,  Tomoyuki Abe ,  Yasutomo Maehara ,  Takashi Nakagawa ,  Shin Hirano

IPC: H05K1/00

CPC classification number: H05K3/4641 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0281 ,  H05K2201/0323 ,  H05K2201/09536 ,  H05K2201/09809 ,  Y10T428/24331

Abstract: The core layer of a core substrate is made of carbon fibers impregnated with resin. When the temperature of the core layer increases, the core layer suffers from an increase in the thickness because of thermal expansion of the resin. The core layer is sandwiched between the insulating layers containing glass fibers. The insulating layers serve to suppress an increase in the thickness of the core layer resulting from the thermal expansion of the core layer. Thermal stress is suppressed in the core substrate.

Abstract translation: 核心基材的芯层由浸渍有树脂的碳纤维制成。 当芯层的温度升高时，由于树脂的热膨胀，芯层的厚度增加。 芯层夹在包含玻璃纤维的绝缘层之间。 绝缘层用于抑制由芯层的热膨胀产生的芯层的厚度的增加。 核心基板中的热应力被抑制。

公开(公告)号：US08119220B2

公开(公告)日：2012-02-21

申请号：US12086983

申请日：2006-08-10

Applicant: Xinhe Tang ,  Ka Chun Tse ,  Ernst Hammel ,  Ben Zhong Tang

Inventor： Xinhe Tang ,  Ka Chun Tse ,  Ernst Hammel ,  Ben Zhong Tang

IPC: B32B5/12 ,  B32B27/38 ,  C08L63/00 ,  C08L67/00 ,  H01F1/42

CPC classification number: C09J163/00 ,  B32B7/12 ,  B32B9/005 ,  B32B9/041 ,  B32B15/20 ,  B32B27/20 ,  B32B27/36 ,  B32B27/38 ,  B32B2250/40 ,  B32B2255/26 ,  B32B2262/02 ,  B32B2262/106 ,  B32B2264/102 ,  B32B2307/208 ,  B32B2307/302 ,  B82Y10/00 ,  B82Y30/00 ,  C08K7/02 ,  C08K2201/011 ,  C09J11/00 ,  H01L23/373 ,  H01L23/3735 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K3/386 ,  H05K2201/0251 ,  H05K2201/026 ,  H05K2201/0323 ,  H05K2201/0355 ,  H05K2201/083 ,  H05K2203/104 ,  Y10T428/24 ,  Y10T428/24058 ,  Y10T428/24132 ,  Y10T428/249942 ,  Y10T428/31515 ,  H01L2924/00

Abstract: Disclosed is a multilayer material in which at least two components are jointed to each other via an adhesive bond. The adhesive bond is formed by an adhesive or bonding layer containing nanofiber material in a matrix that is suitable as an adhesive.

Abstract translation: 公开了一种多层材料，其中至少两种组分经由粘合剂粘结而相互连接。 粘合剂粘合剂是由适合作为粘合剂的基质中含有纳米纤维材料的粘合剂或粘合层形成的。

公开(公告)号：US08110749B2

公开(公告)日：2012-02-07

申请号：US12390168

申请日：2009-02-20

Applicant: Hideaki Yoshimura ,  Kenji Iida ,  Tomoyuki Abe ,  Yasutomo Maehara ,  Shin Hirano

Inventor： Hideaki Yoshimura ,  Kenji Iida ,  Tomoyuki Abe ,  Yasutomo Maehara ,  Shin Hirano

IPC: H05K1/16

CPC classification number: H05K3/445 ,  H05K3/4608 ,  H05K2201/0323 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09609 ,  H05K2201/09809

Abstract: Large-sized through holes are formed in a core layer of a printed wiring board. Large-sized vias are formed in the shape of a cylinder along the inward wall surfaces of the large-sized through holes located within a specific area. A filling material fills the inner space of the large-sized via. A small-sized through hole penetrates through the corresponding filling material along the longitudinal axis of the small-sized through hole. A small-sized via is formed in the shape of a cylinder along the inward wall surface of the small-sized through hole. The filling material and the core layer are uniformly distributed within the specific area in the in-plane direction of the core substrate. This results in suppression of uneven distribution of thermal stress in the core layer in the in-plane direction of the core layer.

Abstract translation: 在印刷电路板的芯层中形成大尺寸的通孔。 大尺寸通孔沿着位于特定区域内的大尺寸通孔的内壁表面形成为圆柱体的形状。 填充材料填充大尺寸通孔的内部空间。 小尺寸的通孔穿过相应的填充材料沿着小尺寸通孔的纵向轴线。 小尺寸的通孔沿着小尺寸通孔的内壁表面形成为圆柱体的形状。 填充材料和芯层均匀地分布在芯基板的面内方向的特定区域内。 这导致抑制芯层在芯层的面内方向上的热应力的不均匀分布。