公开(公告)号：US08319116B2

公开(公告)日：2012-11-27

申请号：US12557630

申请日：2009-09-11

Applicant: Jorge Eduardo Martinez-Vargas ,  Lien-Fen (Livia) Hu ,  Samuel Ming Sien Lee ,  James David Britton ,  Martin John Henson

Inventor： Jorge Eduardo Martinez-Vargas ,  Lien-Fen (Livia) Hu ,  Samuel Ming Sien Lee ,  James David Britton ,  Martin John Henson

IPC: H05K1/11

CPC classification number: H05K1/116 ,  H05K3/3447 ,  H05K3/429 ,  H05K2201/062 ,  H05K2201/09309 ,  H05K2201/09454 ,  H05K2201/09627 ,  H05K2201/09781 ,  Y10T29/49124 ,  Y10T29/49142

Abstract: Systems and methods for providing mechanically reinforced plated through-holes (PTH) in PCBs, which advantageously allow improved soldering capabilities and reliability, are described herein. Such systems and methods are achieved by reducing the heat sinking effects of PTHs by providing one or more vias surrounding the PTHs to provide an electrical connection between the PTH and the internal and bottom conductive layers of a PCB. In this regard, the PTHs are spaced apart from at least one of the internal conductive layers (e.g., ground or power layers), so the heat sinking effects are reduced. This feature enables molten solder to substantially fill the entire PTH before freezing, thereby improving the mechanical and electrical connection between an electrical component and the PCB. One or more electrically-nonfunctional lands (or “rib reinforcements”) are provided in internal conductive layers to mechanically support the walls of the PCB. These rib reinforcements improve the mechanical strength of the PTHs without affecting the electrical performance and without impacting the ability to solder components to the PCB.

Abstract translation: 本文描述了用于在PCB中提供机械加强电镀通孔（PTH）的系统和方法，其有利地允许改进的焊接能力和可靠性。 通过提供围绕PTH的一个或多个通孔来提供PTH与PCB的内部和底部导电层之间的电连接来减少PTH的散热效应来实现这种系统和方法。 在这方面，PTH与至少一个内部导电层（例如，接地层或功率层）间隔开，因此降低了散热效果。 该特征使得熔融焊料在冷冻之前基本上填充整个PTH，从而改善电气部件和PCB之间的机械和电连接。 在内部导电层中提供一个或多个电 - 非功能性焊盘（或肋加强件）以机械地支撑PCB的壁。 这些肋加强件可以改善PTH的机械强度，而不影响电气性能，并且不影响将部件焊接到PCB的能力。

公开(公告)号：US20110154659A1

公开(公告)日：2011-06-30

申请号：US12984074

申请日：2011-01-04

Applicant: James David Britton ,  Jorge Eduardo Martinez-Vargas, JR.

Inventor： James David Britton ,  Jorge Eduardo Martinez-Vargas, JR.

IPC: H05K3/34

CPC classification number: H05K3/3447 ,  H05K3/429 ,  H05K3/4641 ,  H05K2201/0352 ,  H05K2201/062 ,  H05K2201/09309 ,  Y10T29/49144

Abstract: Apparatuses and methods that provide for enhanced connections between PTHs of multi-layer PCBs and electronic component leads, pins or the like. The apparatuses and methods improve the likelihood that the PTHs are completely filled with solder thereby advantageously allowing the PCBs to exhibit high mechanical and electrical reliability. Complete filling of PTHs is achieved by configuring the electrically conductive layers within the multi-layer PCB stack in a manner that reduces the heat sinking effects of the layers during the soldering process. In this regard, the PTHs may not directly contact all of the internal ground or power planes, so the heat sinking or heat transfer effects are reduced. This feature enables molten solder to substantially or completely fill an entire PTH before freezing.

Abstract translation: 提供多层PCB的PTH和电子元件引线，引脚等之间的增强连接的装置和方法。 这些装置和方法提高了PTH完全填充焊料的可能性，从而有利地允许PCB显示出高的机械和电气可靠性。 通过在多层PCB堆叠内配置导电层，以减少焊接过程中各层的散热效应的方法来实现PTH的完全填充。 在这方面，PTH可能不直接接触所有内部地面或电力平面，因此减少了散热或传热效应。 该特征使得熔融焊料在冷冻之前基本上或完全填充整个PTH。

公开(公告)号：US20110061233A1

公开(公告)日：2011-03-17

申请号：US12557630

申请日：2009-09-11

Applicant: Jorge Eduardo Martinez-Vargas ,  Lien-Fen(Livia) Hu ,  Samuel Ming Sien Lee ,  James David Britton ,  Martin John Henson

Inventor： Jorge Eduardo Martinez-Vargas ,  Lien-Fen(Livia) Hu ,  Samuel Ming Sien Lee ,  James David Britton ,  Martin John Henson

IPC: H05K3/34 ,  H05K1/11

CPC classification number: H05K1/116 ,  H05K3/3447 ,  H05K3/429 ,  H05K2201/062 ,  H05K2201/09309 ,  H05K2201/09454 ,  H05K2201/09627 ,  H05K2201/09781 ,  Y10T29/49124 ,  Y10T29/49142

Abstract: Systems and methods for providing mechanically reinforced plated through-holes (PTH) in PCBs, which advantageously allow improved soldering capabilities and reliability, are described herein. Such systems and methods are achieved by reducing the heat sinking effects of PTHs by providing one or more vias surrounding the PTHs to provide an electrical connection between the PTH and the internal and bottom conductive layers of a PCB. In this regard, the PTHs are spaced apart from at least one of the internal conductive layers (e.g., ground or power layers), so the heat sinking effects are reduced. This feature enables molten solder to substantially fill the entire PTH before freezing, thereby improving the mechanical and electrical connection between an electrical component and the PCB. One or more electrically-nonfunctional lands (or “rib reinforcements”) are provided in internal conductive layers to mechanically support the walls of the PCB. These rib reinforcements improve the mechanical strength of the PTHs without affecting the electrical performance and without impacting the ability to solder components to the PCB.

Abstract translation: 本文描述了用于在PCB中提供机械加强电镀通孔（PTH）的系统和方法，其有利地允许改进的焊接能力和可靠性。 通过提供围绕PTH的一个或多个通孔来提供PTH与PCB的内部和底部导电层之间的电连接来减少PTH的散热效应来实现这种系统和方法。 在这方面，PTH与至少一个内部导电层（例如，接地层或功率层）间隔开，因此降低了散热效果。 该特征使得熔融焊料在冷冻之前基本上填充整个PTH，从而改善电气部件和PCB之间的机械和电连接。 在内部导电层中提供一个或多个电 - 非功能焊盘（或“肋加强件”）以机械地支撑PCB的壁。 这些肋加强件可以改善PTH的机械强度，而不影响电气性能，并且不影响将部件焊接到PCB的能力。

公开(公告)号：US07902465B1

公开(公告)日：2011-03-08

申请号：US12651150

申请日：2009-12-31

Applicant: James David Britton ,  Jorge Eduardo Martinez-Vargas

Inventor： James David Britton ,  Jorge Eduardo Martinez-Vargas

IPC: H01R12/04 ,  H05K1/11

CPC classification number: H05K3/3447 ,  H05K3/429 ,  H05K3/4641 ,  H05K2201/0352 ,  H05K2201/062 ,  H05K2201/09309 ,  Y10T29/49144

Abstract: Apparatuses and methods that provide for enhanced connections between PTHs of multi-layer PCBs and electronic component leads, pins or the like, are described herein. The apparatuses and methods improve the likelihood that the PTHs are completely filled with solder thereby advantageously allowing the PCBs to exhibit high mechanical and electrical reliability. Complete filling of PTHs is achieved by configuring the electrically conductive layers within the multi-layer PCB stack in a manner that reduces the heat sinking effects of the layers during the soldering process. In this regard, the PTHs may not directly contact all of the internal ground or power planes, so the heat sinking or heat transfer effects are reduced. This feature enables molten solder to substantially or completely fill an entire PTH before freezing.

Abstract translation: 本文描述了提供多层PCB的PTH与电子部件引线，引脚等之间的增强连接的装置和方法。 这些装置和方法提高了PTH完全填充焊料的可能性，从而有利地允许PCB显示出高的机械和电气可靠性。 通过在多层PCB堆叠内配置导电层，以减少焊接过程中各层的散热效应的方法来实现PTH的完全填充。 在这方面，PTH可能不直接接触所有内部地面或电力平面，因此减少了散热或传热效应。 该特征使得熔融焊料在冷冻之前基本上或完全填充整个PTH。

公开(公告)号：US20100155106A1

公开(公告)日：2010-06-24

申请号：US12341783

申请日：2008-12-22

Applicant: James David Britton ,  Thomas J. Pelc ,  Jorge Eduardo Martinez-Vargas, JR.

Inventor： James David Britton ,  Thomas J. Pelc ,  Jorge Eduardo Martinez-Vargas, JR.

IPC: H05K1/02 ,  H05K3/22

CPC classification number: H05K1/0269 ,  H05K3/303 ,  H05K3/341 ,  H05K2203/161 ,  H05K2203/163 ,  H05K2203/168 ,  Y02P70/613 ,  Y10T29/49124

Abstract: Implementations of the present invention may involve methods for providing an optical differentiation on a printed circuit board to assist in identifying a missing or improperly mounted component. The optical differentiation may be such that, when a component of the board is missing or improperly attached to the board, a distinct optical difference is created on the board in the visible or non-visible spectrum. Several implementations may create a visible color difference, a non-visible mark, a recognizable shape, texture change, cross hatching or other form of physical modification beneath the component or on the printed circuit board. Other implementations may include the optical differentiation within a silk-screen of the board or on an internal layer of the board.

Abstract translation: 本发明的实施方案可以涉及用于在印刷电路板上提供光学差分以帮助识别丢失或不正确安装的部件的方法。 光学差分可以是这样的，当板的组件丢失或不适当地附接到板时，在可见光或不可见光谱中的板上产生明显的光学差异。 几个实现可以在组件或印刷电路板下方产生可见的色差，不可见标记，可识别的形状，纹理变化，交叉阴影或其他形式的物理修改。 其他实施方案可以包括在板的丝网内或在板的内层上的光学差异。