公开(公告)号：US20080099706A1

公开(公告)日：2008-05-01

申请号：US11973277

申请日：2007-10-05

Applicant: Daniel Cook ,  Roger Howe

Inventor： Daniel Cook ,  Roger Howe

IPC: F16K31/02 ,  H03C1/00

CPC classification number: F16K37/0041 ,  F15B13/0402 ,  F15B13/0446 ,  F16K11/07 ,  F16K27/041 ,  F16K27/048 ,  F16K31/02 ,  F16K31/04 ,  F16K31/0613 ,  H01F7/1844 ,  Y10S251/905 ,  Y10T137/0396 ,  Y10T137/2529 ,  Y10T137/7761 ,  Y10T137/86614 ,  Y10T137/86622 ,  Y10T137/87217

Abstract: A method is disclosed that includes allowing both frequency and amplitude of a periodic waveform to be adjusted. The method also includes creating the periodic waveform having the frequency and the amplitude. The periodic waveform is coupled to at least one control signal. The at least one control signal is provided to an output suitable for coupling to an actuator of an electronically controlled device. An apparatus and computer program product are disclosed.

Abstract translation: 公开了一种包括允许调整周期波形的频率和幅度的方法。 该方法还包括创建具有频率和幅度的周期性波形。 周期性波形耦合到至少一个控制信号。 至少一个控制信号被提供给适于耦合到电子控制装置的致动器的输出。 公开了一种装置和计算机程序产品。

公开(公告)号：US20060017523A1

公开(公告)日：2006-01-26

申请号：US11146303

申请日：2005-06-03

Applicant: Sunil Bhave ,  Roger Howe

Inventor： Sunil Bhave ,  Roger Howe

IPC: H03H9/00

CPC classification number: H03H9/2405 ,  H03H9/02259 ,  H03H2009/02496 ,  H03H2009/02511

Abstract: An electrostatic transducer for micromechanical resonators, in which the electrode gaps are filled with a dielectric material having a much higher permittivity than air. This internal electrostatic transducer has several advantages over both air-gap electrostatic and piezoelectric transduction; including lower motional impedance, compatibility with advanced scaled CMOS device technology, and extended dynamic range. In one aspect, in order to minimize energy losses, the dielectric material has an acoustic velocity which is matched to that of the resonator material. Internal electrostatic transduction can be adapted to excite and detect either vertical modes (perpendicular to the substrate) or lateral modes (in the plane of the substrate). Its increased transduction efficiency is of particular importance for reducing the motional resistance of the latter.

公开(公告)号：US20060008661A1

公开(公告)日：2006-01-12

申请号：US10903864

申请日：2004-07-29

Applicant: Muthu Wijesundara ,  Gianluca Valente ,  Roger Howe ,  Albert Pisano ,  Carlo Carraro ,  Roya Maboudian

Inventor： Muthu Wijesundara ,  Gianluca Valente ,  Roger Howe ,  Albert Pisano ,  Carlo Carraro ,  Roya Maboudian

IPC: B32B13/04

CPC classification number: C23C16/36 ,  C23C16/325 ,  C23C16/56 ,  H01L21/0237 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02529 ,  H01L21/02576 ,  H01L21/02609 ,  H01L21/0262

Abstract: A method of depositing silicon carbide on a substrate, including placing a substrate in a low pressure chemical vapor deposition chamber; flowing a single source precursor gas containing silicon and carbon into the chamber; maintaining the chamber at a pressure not less than approximately 5 mTorr; and maintaining the substrate temperature less than approximately 900° C. The Method also includes a method for depositing a nitrogen doped silicon carbide by the addition of nitrogen containing gas into the chamber along with flowing a single source precursor gas containing silicon and carbon into the chamber.

Abstract translation: 一种在基板上沉积碳化硅的方法，包括将基板放置在低压化学气相沉积室中; 将含有硅和碳的单一源前体气体流入室中; 将室保持在不小于约5mTorr的压力下; 并保持衬底温度低于约900℃。该方法还包括通过将含氮气体加入到室中来沉积氮掺杂碳化硅的方法，同时将含有硅和碳的单一源前体气体流入室 。

公开(公告)号：US20050250236A1

公开(公告)日：2005-11-10

申请号：US11121690

申请日：2005-05-03

Applicant: Hideki Takeuchi ,  Emmanuel Quevy ,  Tsu-Jae King ,  Roger Howe

Inventor： Hideki Takeuchi ,  Emmanuel Quevy ,  Tsu-Jae King ,  Roger Howe

IPC: H01L21/00

CPC classification number: B81C1/00142 ,  B81B2201/0271 ,  B81C2201/0109 ,  Y10S438/933

Abstract: In fabricating a microelectromechanical structure (MEMS), a method of forming a narrow gap in the MEMS includes a) depositing a layer of sacrificial material on the surface of a supporting substrate, b) photoresist masking and at least partially etching the sacrificial material to form at least one blade of sacrificial material, c) depositing a structural layer over the sacrificial layer, and d) removing the sacrificial layer including the blade of the sacrificial material with a narrow gap remaining in the structural layer where the blade of sacrificial material was removed.

Abstract translation: 在制造微机电结构（MEMS）中，在MEMS中形成窄间隙的方法包括：a）在支撑衬底的表面上沉积牺牲材料层，b）光致抗蚀剂掩模并且至少部分蚀刻牺牲材料以形成 至少一个牺牲材料刀片，c）在所述牺牲层上沉积结构层，以及d）去除包括所述牺牲材料刀片的所述牺牲层，其中所述牺牲材料刀片被去除的所述结构层中残留有窄间隙 。

公开(公告)号：US20060261703A1

公开(公告)日：2006-11-23

申请号：US11361814

申请日：2006-02-23

Applicant: Emmanuel Quevy ,  Roger Howe

Inventor： Emmanuel Quevy ,  Roger Howe

IPC: H01L41/09

CPC classification number: G01K7/32 ,  G04G3/04 ,  H03H9/02448 ,  H03H9/2473 ,  H03H2009/02496

Abstract: Disclosed is an oscillator that relies on redundancy of similar resonators integrated on chip in order to fulfill the requirement of one single quartz resonator. The immediate benefit of that approach compared to quartz technology is the monolithic integration of the reference signal function, implying smaller devices as well as cost and power savings.

公开(公告)号：US20050001276A1

公开(公告)日：2005-01-06

申请号：US10613508

申请日：2003-07-03

Applicant: Di Gao ,  Roger Howe ,  Roya Maboudian

Inventor： Di Gao ,  Roger Howe ,  Roya Maboudian

IPC: B81C1/00 ,  H01L21/00 ,  H01L21/04 ,  H01L21/306 ,  H01L21/308 ,  H01L29/82

CPC classification number: H01L21/0475 ,  B81C1/00595 ,  B81C2201/0109 ,  B81C2201/0132

Abstract: A method of etching silicon carbide using a nonmetallic mask layer. The method includes providing a silicon carbide substrate; forming a non-metallic mask layer by applying a layer of material on the substrate; patterning the mask layer to expose underlying areas of the substrate; and etching the underlying areas of the substrate with a plasma at a first rate, while etching the mask layer at a rate lower than the first rate.

Abstract translation: 使用非金属掩模层蚀刻碳化硅的方法。 该方法包括提供碳化硅衬底; 通过在衬底上施加一层材料形成非金属掩模层; 图案化掩模层以暴露衬底的下面的区域; 并以等于第一速率蚀刻衬底的下面的区域，同时以低于第一速率的速率蚀刻掩模层。