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    Substrate structure and manufacturing process
    2.
    发明授权
    Substrate structure and manufacturing process 有权

    公开(公告)号：US11189610B2

    公开(公告)日：2021-11-30

    申请号：US16020953

    申请日：2018-06-27

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Li-Chuan Tsai ,  Wu Chang Wang

    IPC: H05K1/02 ,  H01L23/02 ,  H01L27/02 ,  H01L21/67 ,  H01L23/544 ,  H01L21/78 ,  H01L21/56 ,  H01L21/66

    Abstract: A substrate structure includes at least one detachable first substrate unit and a substrate body. The detachable first substrate unit includes a plurality of corners and a plurality of first engagement portions. Each of the first engagement portions is disposed at each of the corners of the detachable first substrate unit. The substrate body includes a plurality of second substrate units, at least one opening and a plurality of second engagement portions. The opening is substantially defined by a plurality of sidewalls of the second substrate units, and includes a plurality of corners. Each of the second engagement portions is disposed at each of the corners of the opening. The detachable first substrate unit is disposed in the opening, and the second engagement portions are engaged with the first engagement portions.

    Circuit board with embedded passive component and manufacturing method thereof
    5.
    发明授权
    Circuit board with embedded passive component and manufacturing method thereof 有权
    嵌入式无源元件电路板及其制造方法

    公开(公告)号：US09426891B2

    公开(公告)日：2016-08-23

    申请号：US14550615

    申请日：2014-11-21

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Li-Chuan Tsai ,  Chih-Cheng Lee

    IPC: H01L23/52 ,  H05K1/18 ,  H01L21/48 ,  H01L23/498 ,  H05K3/34 ,  H05K3/00

    CPC classification number: H05K1/186 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K3/007 ,  H05K3/34 ,  H05K2203/06 ,  H01L2924/00

    Abstract: The present disclosure relates to a semiconductor device substrate and a method for making the same. The semiconductor device substrate includes a first dielectric layer, a second dielectric layer and an electronic component. The first dielectric layer includes a body portion, and a wall portion protruded from a first surface of the body portion. The wall portion has an end. The second dielectric layer has a first surface and an opposing second surface. The first surface of the second dielectric layer is adjacent to the first surface of the body portion. The second dielectric layer surrounds the wall portion. The end of the wall portion extends beyond the second surface of the second dielectric layer. The electronic component includes a first electrical contact and a second electrical contact. At least a part of the electronic component is surrounded by the wall portion.

    Abstract translation: 本公开涉及一种半导体器件基板及其制造方法。 半导体器件基板包括第一介电层，第二介电层和电子部件。 第一电介质层包括主体部分和从主体部分的第一表面突出的壁部分。 壁部分有一端。 第二电介质层具有第一表面和相对的第二表面。 第二电介质层的第一表面与主体部分的第一表面相邻。 第二电介质层围绕壁部。 壁部分的端部延伸超过第二介电层的第二表面。 电子部件包括第一电接触和第二电接触。 电子部件的至少一部分被壁部包围。

    Substrate having a conductive structure within photo-sensitive resin
    8.
    发明授权
    Substrate having a conductive structure within photo-sensitive resin 有权

    公开(公告)号：US10515884B2

    公开(公告)日：2019-12-24

    申请号：US14624388

    申请日：2015-02-17

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Tien-Szu Chen ,  Kuang-Hsiung Chen ,  Sheng-Ming Wang ,  Yu-Ying Lee ,  Li-Chuan Tsai ,  Chih-Cheng Lee

    IPC: H01L23/498 ,  H01L21/48 ,  H01L23/31

    Abstract: The present disclosure relates to a semiconductor substrate structure, semiconductor package and method of manufacturing the same. The semiconductor substrate structure includes a conductive structure, a dielectric structure and a metal bump. The conductive structure has a first conductive surface and a second conductive surface. The dielectric structure has a first dielectric surface and a second dielectric surface. The first conductive surface does not protrude from the first dielectric surface. The second conductive surface is recessed from the second dielectric surface. The metal bump is disposed in a dielectric opening of the dielectric structure, and is physically and electrically connected to the second conductive surface. The metal bump has a concave surface.

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