公开(公告)号：US12027467B2

公开(公告)日：2024-07-02

申请号：US17163213

申请日：2021-01-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Chih Cho ,  Shao-Lun Yang ,  Chun-Hung Yeh ,  Tsung-Wei Lu

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/5383 ,  H01L23/5386

Abstract: The present disclosure provides a semiconductor device package and a method of manufacturing the same. The semiconductor device package includes a substrate, an interconnection structure, a package body, and a first electronic component. The interconnection structure is disposed on the substrate. The package body is disposed on the substrate and partially covers the interconnection structure. The package body has a position limiting structure around the interconnection structure. The first electronic component is disposed on the interconnection structure and electrically connected to the interconnection structure.

公开(公告)号：US12155111B2

公开(公告)日：2024-11-26

申请号：US17566573

申请日：2021-12-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chung Ju Yu ,  Shao-Lun Yang ,  Chun-Hung Yeh ,  Hong Jie Chen ,  Tsung-Wei Lu ,  Wei Shuen Kao

IPC: H01L23/66 ,  H01L21/56 ,  H01L23/06 ,  H01L23/31 ,  H01Q1/22 ,  H01Q13/18

Abstract: An electronic package and a method of manufacturing an electronic package are provided. The electronic package includes a carrier, an antenna substrate, and an electronic component. The carrier has a first surface and a second surface. The antenna substrate includes a resonant cavity and is disposed over the first surface. The antenna substrate is closer to the first surface than the second surface of the carrier. The electronic component is disposed between the antenna substrate and the second surface of the carrier.

公开(公告)号：US10312198B2

公开(公告)日：2019-06-04

申请号：US15789858

申请日：2017-10-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shao-Lun Yang ,  Yu-Shun Hsieh ,  Chia Yi Cheng ,  Hong Jie Chen ,  Shih Yu Huang

IPC: H01L23/52 ,  H01L23/552 ,  H01L23/495

Abstract: A semiconductor device package includes a lead frame, an electronic component, a package body, at least one conductive via and a conductive layer. The lead frame includes a paddle, a connection element and a plurality of leads. The electronic component is disposed on the paddle. The package body encapsulates the electronic component and the lead frame. The at least one conductive via is disposed in the package body, electrically connected to the connection element, and exposed from the package body. The conductive layer is disposed on the package body and the conductive via.

公开(公告)号：US12074118B2

公开(公告)日：2024-08-27

申请号：US18209412

申请日：2023-06-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chia Hsiu Huang ,  Chun Chen Chen ,  Wei Chih Cho ,  Shao-Lun Yang

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/562 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265

Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a substrate, a clip, and a support structure. The clip is disposed on the substrate. The clip includes a first portion and a second portion separated from each other by a slit. The support structure is above the substrate and supports the clip. The support structure has a first surface and a second surface facing the first surface, and the first surface and the second surface define a gap.

公开(公告)号：US20220246533A1

公开(公告)日：2022-08-04

申请号：US17163213

申请日：2021-01-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Chih CHO ,  Shao-Lun Yang ,  Chun-Hung YEH ,  Tsung-Wei LU

IPC: H01L23/538 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: The present disclosure provides a semiconductor device package and a method of manufacturing the same. The semiconductor device package includes a substrate, an interconnection structure, a package body, and a first electronic component. The interconnection structure is disposed on the substrate. The package body is disposed on the substrate and partially covers the interconnection structure. The package body has a position limiting structure around the interconnection structure. The first electronic component is disposed on the interconnection structure and electrically connected to the interconnection structure.

公开(公告)号：US12266610B2

公开(公告)日：2025-04-01

申请号：US17942984

申请日：2022-09-12

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yencheng Kuo ,  Shao-Lun Yang

IPC: H01L23/538 ,  B81B7/00 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L25/16

Abstract: A semiconductor package device and a method of manufacturing a semiconductor package device are provided. The semiconductor package device includes a substrate, a first electronic component, a first dielectric layer, and a first hole. The substrate has a first surface and a second surface opposite to the first surface. The first electronic component is disposed on the first surface. The first dielectric layer is disposed on the second surface and has a third surface away from the substrate. The first hole extends from the first dielectric layer and the substrate. The first hole is substantially aligned with the first electronic component.

公开(公告)号：US11676912B2

公开(公告)日：2023-06-13

申请号：US17133365

申请日：2020-12-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chia Hsiu Huang ,  Chun Chen Chen ,  Wei Chih Cho ,  Shao-Lun Yang

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/562 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265

Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a substrate, a clip, and a support structure. The clip is disposed on the substrate. The clip includes a first portion and a second portion separated from each other by a slit. The support structure is above the substrate and supports the clip. The support structure has a first surface and a second surface facing the first surface, and the first surface and the second surface define a gap.

公开(公告)号：US11444032B2

公开(公告)日：2022-09-13

申请号：US16917335

申请日：2020-06-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yencheng Kuo ,  Shao-Lun Yang

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/48 ,  H01L23/498 ,  B81B7/00 ,  H01L25/16

Abstract: A semiconductor package device and a method of manufacturing a semiconductor package device are provided. The semiconductor package device includes a substrate, a first electronic component, a first dielectric layer, and a first hole. The substrate has a first surface and a second surface opposite to the first surface. The first electronic component is disposed on the first surface. The first dielectric layer is disposed on the second surface and has a third surface away from the substrate. The first hole extends from the first dielectric layer and the substrate. The first hole is substantially aligned with the first electronic component.

公开(公告)号：US11462467B2

公开(公告)日：2022-10-04

申请号：US16929018

申请日：2020-07-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chia Hsiu Huang ,  Chun Chen Chen ,  Wei Chih Cho ,  Shao-Lun Yang ,  Yu-Shun Hsieh

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/31 ,  H01L23/00 ,  H01L23/495

Abstract: A lead frame includes a die paddle and a plurality of leads. The leads surround the die paddle. Each of the leads includes an inner lead portion and an outer lead portion connecting to the inner lead portion. The inner lead portion is adjacent to and spaced apart from the die paddle. A bottom surface of the inner lead portion is higher than a bottom surface of the outer lead portion. The bottom surface of the inner lead portion includes one or more supporting members disposed thereon. The one or more supporting members have a convex surface facing away from the inner lead portion.

公开(公告)号：US11443997B2

公开(公告)日：2022-09-13

申请号：US16933806

申请日：2020-07-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei Chih Cho ,  Chun Chen Chen ,  Shao-Lun Yang

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L21/56 ,  H01L25/00 ,  H01L25/18 ,  H01L25/065

Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a first substrate, a second substrate, and a barrier structure. The first substrate has a first surface and a second surface opposite to the first surface. The second substrate has a first surface facing the second surface of the first substrate. The first substrate electrically bonds to the second substrate through a conductive terminal disposed between the second surface of the first substrate and the first surface of the second substrate. The barrier structure is disposed adjacent to the first surface of the first substrate.