公开(公告)号：US10032705B2

公开(公告)日：2018-07-24

申请号：US15149141

申请日：2016-05-08

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang ,  Wook Choi ,  KooWoong Jeong ,  Byong Jin Kim ,  Min Chul Shin ,  Ho Jeong Lim ,  Ji Hyun Kim ,  Chang Hun Kim

IPC: H01L23/52 ,  H01L23/498 ,  H01L23/538 ,  H01L21/48 ,  H01L25/16 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

公开(公告)号：US11152296B2

公开(公告)日：2021-10-19

申请号：US16042798

申请日：2018-07-23

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang ,  Wook Choi ,  KooWoong Jeong ,  Byong Jin Kim ,  Min Chul Shin ,  Ho Jeong Lim ,  Ji Hyun Kim ,  Chang Hun Kim

IPC: H01L23/498 ,  H01L23/538 ,  H01L25/16 ,  H01L23/13 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L23/50 ,  H01L21/48

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

公开(公告)号：US09809446B1

公开(公告)日：2017-11-07

申请号：US15149669

申请日：2016-05-09

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Byong Jin Kim ,  Young Seok Kim ,  Wook Choi ,  Seung Jae Yoo ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang

IPC: H01L23/28 ,  H01L23/31 ,  B81B3/00 ,  B81C1/00 ,  H01L23/00 ,  H01L21/56

CPC classification number: B81B3/0072 ,  B81C1/00666 ,  H01L21/568 ,  H01L23/055 ,  H01L23/28 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/562 ,  H01L24/83 ,  H01L24/97 ,  H01L25/065 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/16152

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.

公开(公告)号：US20170320723A1

公开(公告)日：2017-11-09

申请号：US15149669

申请日：2016-05-09

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Byong Jin Kim ,  Young Seok Kim ,  Wook Choi ,  Seung Jae Yoo ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang

IPC: B81B3/00 ,  B81C1/00 ,  H01L23/00 ,  H01L23/31 ,  H01L23/28 ,  H01L21/56

CPC classification number: B81B3/0072 ,  B81C1/00666 ,  H01L21/568 ,  H01L23/055 ,  H01L23/28 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/562 ,  H01L24/83 ,  H01L24/97 ,  H01L25/065 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/16152

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.

公开(公告)号：US20170018493A1

公开(公告)日：2017-01-19

申请号：US15149141

申请日：2016-05-08

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang ,  Wook Choi ,  KooWoong Jeong ,  Byong Jin Kim ,  Min Chul Shin ,  Ho Jeong Lim ,  Ji Hyun Kim ,  Chang Hun Kim

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/538 ,  H01L23/31

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15159 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19106 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract translation: 半导体封装以及半导体封装的制造方法。 作为非限制性示例，本公开的各个方面提供半导体封装及其制造方法，其包括具有第一表面和与第一表面相对的第二表面的基板，并且包括至少一个形成的第一凹部 在从第一表面朝向第二表面的方向上，形成在第一凹部中的多个第一凹陷导电图案和插入到基板的第一凹部中的第一无源元件，并且具有第一电极和第二电极 电连接到多个第一凹槽导电图案。

公开(公告)号：US20180350734A1

公开(公告)日：2018-12-06

申请号：US16042798

申请日：2018-07-23

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang ,  Wook Choi ,  KooWoong Jeong ,  Byong Jin Kim ,  Min Chul Shin ,  Ho Jeong Lim ,  Ji Hyun Kim ,  Chang Hun Kim

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/13 ,  H01L25/16 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L23/50 ,  H01L23/31

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15159 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19106 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

公开(公告)号：US10144634B2

公开(公告)日：2018-12-04

申请号：US15806074

申请日：2017-11-07

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Byong Jin Kim ,  Young Seok Kim ,  Wook Choi ,  Seung Jae Yoo ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang

IPC: B81B3/00 ,  B81C1/00 ,  H01L23/00 ,  H01L23/31 ,  H01L23/28 ,  H01L21/56 ,  H01L23/055 ,  H01L25/065

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.

公开(公告)号：US20180057353A1

公开(公告)日：2018-03-01

申请号：US15806074

申请日：2017-11-07

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Byong Jin Kim ,  Young Seok Kim ,  Wook Choi ,  Seung Jae Yoo ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang

IPC: B81B3/00 ,  B81C1/00 ,  H01L23/00 ,  H01L23/31 ,  H01L23/28 ,  H01L21/56

CPC classification number: B81B3/0072 ,  B81C1/00666 ,  H01L21/568 ,  H01L23/055 ,  H01L23/28 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/562 ,  H01L24/83 ,  H01L24/97 ,  H01L25/065 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/16152

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.