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公开(公告)号:US20190152770A1
公开(公告)日:2019-05-23
申请号:US16255292
申请日:2019-01-23
Applicant: Amkor Technology, Inc.
Inventor: YungWoo Lee , ByungJun Kim , DongHyun Bang , EunNaRa Cho , Adrian Arcedera , JaeUng Lee
IPC: B81B7/00
CPC classification number: B81B7/0061 , B81B2201/0257 , B81B2207/012 , H01L2224/48137 , H01L2224/73265 , H01L2924/15151
Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.
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公开(公告)号:US20180350734A1
公开(公告)日:2018-12-06
申请号:US16042798
申请日:2018-07-23
Applicant: Amkor Technology, Inc.
Inventor: Jae Ung Lee , Yung Woo Lee , EunNaRa Cho , Dong Hyun Bang , Wook Choi , KooWoong Jeong , Byong Jin Kim , Min Chul Shin , Ho Jeong Lim , Ji Hyun Kim , Chang Hun Kim
IPC: H01L23/498 , H01L21/48 , H01L23/13 , H01L25/16 , H01L23/538 , H01L25/065 , H01L23/00 , H01L23/50 , H01L23/31
CPC classification number: H01L23/49838 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L23/13 , H01L23/3128 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L25/0655 , H01L25/16 , H01L2224/0401 , H01L2224/131 , H01L2224/13147 , H01L2224/16227 , H01L2224/16235 , H01L2224/16237 , H01L2924/1432 , H01L2924/1434 , H01L2924/15159 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19106 , H01L2924/014 , H01L2924/00014
Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.
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公开(公告)号:US10144634B2
公开(公告)日:2018-12-04
申请号:US15806074
申请日:2017-11-07
Applicant: Amkor Technology, Inc.
Inventor: Jae Ung Lee , Byong Jin Kim , Young Seok Kim , Wook Choi , Seung Jae Yoo , Yung Woo Lee , EunNaRa Cho , Dong Hyun Bang
IPC: B81B3/00 , B81C1/00 , H01L23/00 , H01L23/31 , H01L23/28 , H01L21/56 , H01L23/055 , H01L25/065
Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.
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公开(公告)号:US20180057353A1
公开(公告)日:2018-03-01
申请号:US15806074
申请日:2017-11-07
Applicant: Amkor Technology, Inc.
Inventor: Jae Ung Lee , Byong Jin Kim , Young Seok Kim , Wook Choi , Seung Jae Yoo , Yung Woo Lee , EunNaRa Cho , Dong Hyun Bang
CPC classification number: B81B3/0072 , B81C1/00666 , H01L21/568 , H01L23/055 , H01L23/28 , H01L23/3121 , H01L23/3135 , H01L23/562 , H01L24/83 , H01L24/97 , H01L25/065 , H01L2224/16225 , H01L2224/48091 , H01L2224/73204 , H01L2924/00014 , H01L2924/16152
Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.
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公开(公告)号:US10032705B2
公开(公告)日:2018-07-24
申请号:US15149141
申请日:2016-05-08
Applicant: Amkor Technology, Inc.
Inventor: Jae Ung Lee , Yung Woo Lee , EunNaRa Cho , Dong Hyun Bang , Wook Choi , KooWoong Jeong , Byong Jin Kim , Min Chul Shin , Ho Jeong Lim , Ji Hyun Kim , Chang Hun Kim
IPC: H01L23/52 , H01L23/498 , H01L23/538 , H01L21/48 , H01L25/16 , H01L23/31 , H01L23/00 , H01L25/065
Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.
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公开(公告)号:US20160221820A1
公开(公告)日:2016-08-04
申请号:US15009012
申请日:2016-01-28
Applicant: Amkor Technology, Inc.
Inventor: YungWoo Lee , ByungJun Kim , DongHyun Bang , EunNaRa Cho , Adrian Arcedera , JaeUng Lee
CPC classification number: B81B7/0061 , B81B2201/0257 , B81B2207/012 , H01L2224/48137 , H01L2224/73265 , H01L2924/15151
Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.
Abstract translation: 公开了使用聚合物基板的半导体封装,并且可以包括聚合物腔结构,其包括第一金属迹线,微机电系统(MEMS)器件和结合到腔结构的空腔内的第一表面的半导体管芯,以及 衬底,其耦合到腔结构并且包括耦合到第一金属迹线的第二金属迹线。 衬底可以封装MEMS器件和半导体管芯。 接地迹线可能在聚合物腔结构的外表面上。 球场可以在与第二金属迹线的表面相对的基板的表面上。 第一金属迹线可以从聚合物空腔结构的第一表面向上延伸到空腔的侧壁和在聚合物腔结构的顶表面上的导电图案。
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公开(公告)号:US09056765B2
公开(公告)日:2015-06-16
申请号:US13937764
申请日:2013-07-09
Applicant: Amkor Technology, Inc.
Inventor: Jong Dae Jung , Dong Hyun Bang , Yung Woo Lee , EunNaRa Cho , Byung Jun Kim
CPC classification number: B81B7/0064 , B81B2201/0257 , B81B2207/012 , B81C1/00269 , B81C2203/0118 , H01L21/565 , H01L23/055 , H01L23/3121 , H01L24/73 , H01L24/97 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48137 , H01L2224/48145 , H01L2224/73265 , H01L2224/97 , H01L2924/12042 , H01L2924/1461 , H01L2924/15151 , H01L2924/16151 , H01L2924/16251 , H01L2924/3025 , H04R23/00 , H04R2201/003 , H01L2924/00014 , H01L2924/00 , H01L2224/85 , H01L2924/00012 , H01L2224/48227
Abstract: Various aspects of the present invention, for example and without limitation, comprise a semiconductor device package and/or method for manufacturing a semiconductor device package. Such a device package may, for example, comprise a MEMS device package.
Abstract translation: 本发明的各个方面,例如但不限于,包括用于制造半导体器件封装的半导体器件封装和/或方法。 这样的器件封装可以例如包括MEMS器件封装。
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公开(公告)号:US20180134546A1
公开(公告)日:2018-05-17
申请号:US15351026
申请日:2016-11-14
Applicant: Amkor Technology, Inc.
Inventor: Ji Hoon Oh , Byong Jin Kim , Jin Young Kim , Young Seok Kim , EunNaRa Cho , Yung Woo Lee , Do Hyun Na
CPC classification number: H01L23/315 , B81C1/0023 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/19105 , H01L2924/00014
Abstract: Disclosed is a semiconductor device including a conductive shield layer formed within a cavity of a molding part and a manufacturing method thereof. Various aspects of the present invention, for example and without limitation, includes a semiconductor device including a conductive shield layer formed along the wall of a cavity to of a molding part to improve EMI shielding performance, and a manufacturing method thereof.
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公开(公告)号:US20170320723A1
公开(公告)日:2017-11-09
申请号:US15149669
申请日:2016-05-09
Applicant: Amkor Technology, Inc.
Inventor: Jae Ung Lee , Byong Jin Kim , Young Seok Kim , Wook Choi , Seung Jae Yoo , Yung Woo Lee , EunNaRa Cho , Dong Hyun Bang
CPC classification number: B81B3/0072 , B81C1/00666 , H01L21/568 , H01L23/055 , H01L23/28 , H01L23/3121 , H01L23/3135 , H01L23/562 , H01L24/83 , H01L24/97 , H01L25/065 , H01L2224/16225 , H01L2224/48091 , H01L2224/73204 , H01L2924/00014 , H01L2924/16152
Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.
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公开(公告)号:US20170018493A1
公开(公告)日:2017-01-19
申请号:US15149141
申请日:2016-05-08
Applicant: Amkor Technology, Inc.
Inventor: Jae Ung Lee , Yung Woo Lee , EunNaRa Cho , Dong Hyun Bang , Wook Choi , KooWoong Jeong , Byong Jin Kim , Min Chul Shin , Ho Jeong Lim , Ji Hyun Kim , Chang Hun Kim
IPC: H01L23/498 , H01L21/48 , H01L23/00 , H01L23/538 , H01L23/31
CPC classification number: H01L23/49838 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L23/13 , H01L23/3128 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L25/0655 , H01L25/16 , H01L2224/0401 , H01L2224/131 , H01L2224/13147 , H01L2224/16227 , H01L2224/16235 , H01L2224/16237 , H01L2924/1432 , H01L2924/1434 , H01L2924/15159 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19106 , H01L2924/014 , H01L2924/00014
Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.
Abstract translation: 半导体封装以及半导体封装的制造方法。 作为非限制性示例,本公开的各个方面提供半导体封装及其制造方法,其包括具有第一表面和与第一表面相对的第二表面的基板,并且包括至少一个形成的第一凹部 在从第一表面朝向第二表面的方向上,形成在第一凹部中的多个第一凹陷导电图案和插入到基板的第一凹部中的第一无源元件,并且具有第一电极和第二电极 电连接到多个第一凹槽导电图案。
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