公开(公告)号：US20170018493A1

公开(公告)日：2017-01-19

申请号：US15149141

申请日：2016-05-08

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang ,  Wook Choi ,  KooWoong Jeong ,  Byong Jin Kim ,  Min Chul Shin ,  Ho Jeong Lim ,  Ji Hyun Kim ,  Chang Hun Kim

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/538 ,  H01L23/31

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15159 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19106 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract translation: 半导体封装以及半导体封装的制造方法。 作为非限制性示例，本公开的各个方面提供半导体封装及其制造方法，其包括具有第一表面和与第一表面相对的第二表面的基板，并且包括至少一个形成的第一凹部 在从第一表面朝向第二表面的方向上，形成在第一凹部中的多个第一凹陷导电图案和插入到基板的第一凹部中的第一无源元件，并且具有第一电极和第二电极 电连接到多个第一凹槽导电图案。

公开(公告)号：US20180350734A1

公开(公告)日：2018-12-06

申请号：US16042798

申请日：2018-07-23

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang ,  Wook Choi ,  KooWoong Jeong ,  Byong Jin Kim ,  Min Chul Shin ,  Ho Jeong Lim ,  Ji Hyun Kim ,  Chang Hun Kim

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/13 ,  H01L25/16 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L23/50 ,  H01L23/31

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15159 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19106 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

公开(公告)号：US09171812B1

公开(公告)日：2015-10-27

申请号：US14088882

申请日：2013-11-25

Applicant: Amkor Technology, Inc.

Inventor： Byong Jin Kim ,  Min Chul Shin ,  Ho Choi

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/00 ,  H01L23/00

CPC classification number: H01L24/06 ,  B23K1/0016 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/10175 ,  H01L2224/13014 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/14153 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014

Abstract: Methods and devices for a semiconductor device having conductive pads to prevent solder reflow are disclosed and may include a substrate comprising conductive pads of rectangular shape and neck-down portions on opposite sides of the rectangular shape, a semiconductor die comprising conductive pillars, and a solder electrically coupling the conductive pillars to the conductive pads. The neck-down portions may comprise a solder mask for the conductive pads to prevent solder from flowing in an unwanted direction on the conductive pads. The conductive pillars may comprise an elliptical cross-section with a minor axis length X and a major axis length Y. The major axis of the elliptical cross-section may be parallel to a long axis of the rectangular shape of the conductive pads. A decrease (W) in width of the conductive pads from the rectangular shape to the neck-down portions may be defined by X/5≦W≦X/2.

Abstract translation: 公开了具有用于防止焊料回流的导电焊盘的半导体器件的方法和器件，并且可以包括：衬底，其包括矩形形状的导电焊盘和矩形相对侧上的颈缩部分，包括导电柱的半导体管芯和焊料 将导电柱电耦合到导电垫。 颈缩部分可以包括用于导电焊盘的焊接掩模，以防止焊料在导电焊盘上以不期望的方向流动。 导电柱可以包括具有短轴长度X和长轴长度Y的椭圆形横截面。椭圆形截面的长轴可以平行于导电垫的矩形形状的长轴。 导电焊盘从矩形到颈缩部分的宽度的减小（W）可以通过X / 5＆amp; NlE; W＆nlE; X / 2来限定。

公开(公告)号：US10032705B2

公开(公告)日：2018-07-24

申请号：US15149141

申请日：2016-05-08

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang ,  Wook Choi ,  KooWoong Jeong ,  Byong Jin Kim ,  Min Chul Shin ,  Ho Jeong Lim ,  Ji Hyun Kim ,  Chang Hun Kim

IPC: H01L23/52 ,  H01L23/498 ,  H01L23/538 ,  H01L21/48 ,  H01L25/16 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

公开(公告)号：US20170323863A1

公开(公告)日：2017-11-09

申请号：US15150342

申请日：2016-05-09

Applicant: Amkor Technology, Inc.

Inventor： Kyoung Yeon Lee ,  Tae Yong Lee ,  Min Chul Shin ,  Se Man Oh

IPC: H01L23/00

CPC classification number: H01L24/11 ,  H01L21/4846 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1111 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16012 ,  H01L2224/16013 ,  H01L2224/16057 ,  H01L2224/16104 ,  H01L2224/16238 ,  H01L2224/81203 ,  H01L2224/81224 ,  H01L2224/81359 ,  H01L2224/81379 ,  H01L2224/81385 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device, and a method of manufacturing thereof, that comprises a substrate including a dielectric layer, at least one conductive trace and conductive bump pad formed on one surface of the dielectric layer, and a protection layer covering the at least one conductive trace and conductive bump pad, the at least one conductive bump pad having one end exposed through the protection layer, and a semiconductor die electrically connected to the conductive bump pad of the substrate.

公开(公告)号：US20170294412A1

公开(公告)日：2017-10-12

申请号：US15297365

申请日：2016-10-19

Applicant: Amkor Technology, Inc.

Inventor： Kyoung Yeon Lee ,  Tae Yong Lee ,  Min Chul Shin ,  Se Man Oh

IPC: H01L25/065 ,  H01L21/48 ,  H01L23/00 ,  H01L25/00 ,  H01L23/538 ,  H01L23/31 ,  H01L21/768 ,  H01L21/56

CPC classification number: H01L23/5384 ,  H01L23/15 ,  H01L23/31 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/48227 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Provided are a semiconductor package and a manufacturing method thereof for securing a space for mounting a semiconductor device by etching a temporary metal plate to form a plurality of conductive posts.

公开(公告)号：US11152296B2

公开(公告)日：2021-10-19

申请号：US16042798

申请日：2018-07-23

Applicant: Amkor Technology, Inc.

Inventor： Jae Ung Lee ,  Yung Woo Lee ,  EunNaRa Cho ,  Dong Hyun Bang ,  Wook Choi ,  KooWoong Jeong ,  Byong Jin Kim ,  Min Chul Shin ,  Ho Jeong Lim ,  Ji Hyun Kim ,  Chang Hun Kim

IPC: H01L23/498 ,  H01L23/538 ,  H01L25/16 ,  H01L23/13 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L23/50 ,  H01L21/48

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

公开(公告)号：US10020263B2

公开(公告)日：2018-07-10

申请号：US15297365

申请日：2016-10-19

Applicant: Amkor Technology, Inc.

Inventor： Kyoung Yeon Lee ,  Tae Yong Lee ,  Min Chul Shin ,  Se Man Oh

IPC: H01L21/44 ,  H01L29/40 ,  H01L23/538 ,  H01L23/15 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/5384 ,  H01L23/15 ,  H01L23/31 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/48227 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Provided are a semiconductor package and a manufacturing method thereof for securing a space for mounting a semiconductor device by etching a temporary metal plate to form a plurality of conductive posts.