公开(公告)号：US20240304437A1

公开(公告)日：2024-09-12

申请号：US18650014

申请日：2024-04-29

Applicant: Applied Materials, Inc.

Inventor： Chuanxi YANG ,  Hang YU ,  Sanjay KAMATH ,  Deenesh PADHI ,  Honggun KIM ,  Euhngi LEE ,  Zubin HUANG ,  Diwakar N. KEDLAYA ,  Rui CHENG ,  Karthik JANAKIRAMAN

IPC: H01L21/02 ,  C23C16/02 ,  C23C16/34 ,  C23C16/513

CPC classification number: H01L21/0217 ,  C23C16/0209 ,  C23C16/345 ,  C23C16/513 ,  H01L21/02274

Abstract: Capacitor devices containing silicon boron nitride with high boron concentration are provided. In one or more examples, a capacitor device is provided and contains a stopper layer containing silicon boron nitride and disposed on a substrate, a dielectric layer disposed on the stopper layer, vias formed within the dielectric layer and the stopper layer, metal contacts disposed on bottoms of the vias, a nitride barrier layer containing a metal nitride material and disposed on walls of the vias and disposed on the metal contacts, and an oxide layer disposed within the vias on the nitride barrier layer, wherein the oxide layer contains one or more holes or voids formed therein. The silicon boron nitride contains about 18 atomic percent (at %) to about 50 at % of boron.

公开(公告)号：US20190153592A1

公开(公告)日：2019-05-23

申请号：US16259011

申请日：2019-01-28

Applicant: Applied Materials, Inc.

Inventor： Dale Du BOIS ,  Mohamad A. AYOUB ,  Robert KIM ,  Amit Kumar BANSAL ,  Mark FODOR ,  Binh NGUYEN ,  Siu F. CHENG ,  Hang YU ,  Chiu CHAN ,  Ganesh BALASUBRAMANIAN ,  Deenesh PADHI ,  Juan Carlos ROCHA

IPC: C23C16/04 ,  C23C16/458 ,  C23C16/455 ,  C23C16/44 ,  H01J37/32 ,  C23C14/04 ,  H01L21/687 ,  C30B25/12 ,  H01J37/34

Abstract: Embodiments of the invention contemplate a shadow ring that provides increased or decreased and more uniform deposition on the edge of a wafer. By removing material from the top and/or bottom surfaces of the shadow ring, increased edge deposition and bevel coverage can be realized. In one embodiment, the material on the bottom surface is reduced by providing a recessed slot on the bottom surface. By increasing the amount of material of the shadow ring, the edge deposition and bevel coverage is reduced. Another approach to adjusting the deposition at the edge of the wafer includes increasing or decreasing the inner diameter of the shadow ring. The material forming the shadow ring may also be varied to change the amount of deposition at the edge of the wafer.

公开(公告)号：US20200211834A1

公开(公告)日：2020-07-02

申请号：US16725226

申请日：2019-12-23

Applicant: Applied Materials, Inc.

Inventor： Chuanxi YANG ,  Hang YU ,  Sanjay KAMATH ,  Deenesh PADHI ,  Honggun KIM ,  Euhngi LEE ,  Zubin HUANG ,  Diwakar N. KEDLAYA ,  Rui CHENG ,  Karthik JANAKIRAMAN

IPC: H01L21/02 ,  C23C16/34 ,  C23C16/02 ,  C23C16/513

Abstract: Methods for forming the silicon boron nitride layer are provided. The method includes positioning a substrate on a pedestal in a process region within a process chamber, heating a pedestal retaining the substrate, and introducing a first flow of a first process gas and a second flow of a second process gas to the process region. The first flow of the first process gas contains silane, ammonia, helium, nitrogen, argon, and hydrogen. The second flow of the second process gas contains diborane and hydrogen. The method also includes forming a plasma concurrently with the first flow of the first process gas and the second flow of the second process gas to the process region and exposing the substrate to the first process gas, the second process gas, and the plasma to deposit the silicon boron nitride layer on the substrate.

公开(公告)号：US20190385844A1

公开(公告)日：2019-12-19

申请号：US16444865

申请日：2019-06-18

Applicant: Applied Materials, Inc.

Inventor： Vinayak Veer VATS ,  Hang YU ,  Deenesh PADHI ,  Changling LI ,  Gregory M. AMICO ,  Sanjay G. KAMATH

IPC: H01L21/02 ,  H01L21/3065

Abstract: Embodiments of the present disclosure relate to methods for in-situ deposition and treatment of a thin film for improved step coverage. In one embodiment, the method for processing a substrate is provided. The method includes forming a dielectric layer on patterned features of the substrate by exposing the substrate to a gas mixture of a first precursor and a second precursor simultaneously with plasma present in a process chamber, wherein the plasma is formed by a first pulsed RF power, exposing the dielectric layer to a first plasma treatment using a gas mixture of nitrogen and helium in the process chamber, and performing a plasma etch process by exposing the dielectric layer to a plasma formed from a gas mixture of a fluorine-containing precursor and a carrier gas, wherein the plasma is formed in the process chamber by a second pulsed RF power.

公开(公告)号：US20190157077A1

公开(公告)日：2019-05-23

申请号：US16176267

申请日：2018-10-31

Applicant: Applied Materials, Inc.

Inventor： Michael Wenyoung TSIANG ,  Hang YU ,  Deenesh PADHI ,  Tza-Jing GUNG

IPC: H01L21/02 ,  H01L21/033 ,  C23C16/34 ,  C23C16/505

Abstract: Embodiments described herein relate to methods of forming silicon nitride films. In one embodiment, a first process gas set including a silicon-containing gas and a first nitrogen-containing gas is flowed into the process chamber. An initiation layer is deposited by applying a first radio frequency power to the first process gas set at a first frequency and a first power level. The first flow of the first nitrogen-containing gas of the first process gas set is discontinued and a second process gas set including the silicon-containing gas, a second nitrogen-containing gas, and a hydrogen-containing gas is flowed into the process chamber. A bulk silicon nitride layer is deposited on the initiation layer by applying a second RF power to the second process gas set at a second frequency higher than the first frequency and a second power level higher than the first power level.