公开(公告)号：US20240237221A9

公开(公告)日：2024-07-11

申请号：US18489921

申请日：2023-10-19

Applicant: IBIDEN CO., LTD.

Inventor： Shogo FUKUI ,  Ryo ANDO ,  Keisuke SHIMIZU

IPC: H05K1/18 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498 ,  H05K3/00

CPC classification number: H05K1/186 ,  H01L21/4857 ,  H01L21/4864 ,  H01L21/56 ,  H01L23/49822 ,  H01L24/19 ,  H01L24/20 ,  H05K3/0035 ,  H05K3/0055 ,  H01L25/0652

Abstract: A method for manufacturing a wiring substrate includes forming conductor pads on a surface of an insulating layer, positioning, on or in the insulating layer, an electronic component having electrode pads, forming a second insulating layer covering the surface of the insulating layer, conductor pads and electronic component, forming first via holes exposing the conductor pads, applying a first desmear treatment to the second insulating layer such that residues are removed from the first via holes, forming second via holes in the second insulating layer after the first desmear treatment such that the second via holes expose the electrode pads of the electronic component positioned on or in the insulating layer, applying a second desmear treatment to the second insulating layer such that residues are removed from the second via holes, forming first via conductors in the first via holes, and forming second via conductors in the second via holes.

公开(公告)号：US20240206061A1

公开(公告)日：2024-06-20

申请号：US18537877

申请日：2023-12-13

Applicant: IBIDEN CO., LTD.

Inventor： Ryo ANDO ,  Nobuhisa KURODA ,  Shogo FUKUI ,  Kosei ICHIKAWA ,  Makoto KATO

IPC: H05K1/03 ,  H05K1/02

CPC classification number: H05K1/0373 ,  H05K1/0298 ,  H05K2201/0209 ,  H05K2201/0254 ,  H05K2201/0269

Abstract: A wiring substrate includes an insulating layer including a first layer and a second layer, and a conductor layer including a metal film formed on a surface of the second layer of the insulating layer such that the conductor layer includes a conductor pattern. The first layer includes resin and first inorganic particles, the second layer includes resin and second inorganic particles at the content rate that is lower than the content rate of the first inorganic particles in the first layer, and the thickness of the first layer is 90% or more of the thickness of the insulating layer. The second layer of the insulating layer includes a composite layer having the thickness in the range of 0.1 to 0.3 μm, and the composite layer includes part of the metal film in the conductor layer formed in gaps between the second inorganic particles and resin in the second layer.

公开(公告)号：US20240234326A9

公开(公告)日：2024-07-11

申请号：US18489952

申请日：2023-10-19

Applicant: IBIDEN CO., LTD.

Inventor： Ikuya TERAUCHI ,  Shogo FUKUI ,  Ryo ANDO ,  Keisuke SHIMIZU

IPC: H01L23/538 ,  H05K1/11

CPC classification number: H01L23/5383 ,  H01L23/5386 ,  H05K1/116 ,  H05K2201/0939 ,  H05K2201/094

Abstract: A wiring substrate includes first conductor pads formed on a surface of an insulating layer, second conductor pads formed on the surface of the insulating layer, a second insulating layer covering the surface of the insulating layer and first and second conductor pads, first via conductors formed in first via holes penetrating through the second insulating layer such that the first via conductors are formed on the first conductor pads, and second via conductors formed in second via holes penetrating through the second insulating layer such that the second via conductors are formed on the second conductor pads. The first and second conductor pads are formed such that an annular width amount of each second conductor pad is smaller than an annular width amount of each first conductor pad and that a haloing amount in each second conductor pad is smaller than a haloing amount in each first conductor pad.

公开(公告)号：US20240138071A1

公开(公告)日：2024-04-25

申请号：US18489921

申请日：2023-10-18

Applicant: IBIDEN CO., LTD.

Inventor： Shogo FUKUI ,  Ryo ANDO ,  Keisuke SHIMIZU

IPC: H05K1/18 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498 ,  H05K3/00

CPC classification number: H05K1/186 ,  H01L21/4857 ,  H01L21/4864 ,  H01L21/56 ,  H01L23/49822 ,  H01L24/19 ,  H01L24/20 ,  H05K3/0035 ,  H05K3/0055 ,  H01L25/0652

Abstract: A method for manufacturing a wiring substrate includes forming conductor pads on a surface of an insulating layer, positioning, on or in the insulating layer, an electronic component having electrode pads, forming a second insulating layer covering the surface of the insulating layer, conductor pads and electronic component, forming first via holes exposing the conductor pads, applying a first desmear treatment to the second insulating layer such that residues are removed from the first via holes, forming second via holes in the second insulating layer after the first desmear treatment such that the second via holes expose the electrode pads of the electronic component positioned on or in the insulating layer, applying a second desmear treatment to the second insulating layer such that residues are removed from the second via holes, forming first via conductors in the first via holes, and forming second via conductors in the second via holes.

公开(公告)号：US20240136294A1

公开(公告)日：2024-04-25

申请号：US18489952

申请日：2023-10-18

Applicant: IBIDEN CO., LTD.

Inventor： Ikuya TERAUCHI ,  Shogo FUKUI ,  Ryo ANDO ,  Keisuke SHIMIZU

IPC: H01L23/538 ,  H05K1/11

CPC classification number: H01L23/5383 ,  H01L23/5386 ,  H05K1/116 ,  H05K2201/0939 ,  H05K2201/094

Abstract: A wiring substrate includes first conductor pads formed on a surface of an insulating layer, second conductor pads formed on the surface of the insulating layer, a second insulating layer covering the surface of the insulating layer and first and second conductor pads, first via conductors formed in first via holes penetrating through the second insulating layer such that the first via conductors are formed on the first conductor pads, and second via conductors formed in second via holes penetrating through the second insulating layer such that the second via conductors are formed on the second conductor pads. The first and second conductor pads are formed such that an annular width amount of each second conductor pad is smaller than an annular width amount of each first conductor pad and that a haloing amount in each second conductor pad is smaller than a haloing amount in each first conductor pad.

公开(公告)号：US20230180385A1

公开(公告)日：2023-06-08

申请号：US18062049

申请日：2022-12-06

Applicant: IBIDEN CO., LTD.

Inventor： Shogo FUKUI ,  Kosuke IKEDA ,  Kosei ICHIKAWA ,  Ryo ANDO

IPC: H05K1/03 ,  H05K3/46 ,  H05K1/11

CPC classification number: H05K1/0373 ,  H05K3/4661 ,  H05K1/112 ,  H05K2201/0209 ,  H05K2201/0263

Abstract: A wiring substrate includes an insulating layer including inorganic filler particles and resin, and a conductor layer including a metal film formed on a surface of the insulating layer and having a conductor pattern. The inorganic filler particles include first inorganic filler particles such that each of the first inorganic filler particles has a portion exposed on the surface of the insulating layer and is at least partially separated from the resin, the conductor layer is formed such that a part of the metal film is between the first inorganic filler particles and the resin from the surface of the insulating layer and that a distance between the surface of the insulating layer and the surface of the insulating layer at a deepest part of the part of the metal film is in the range of 0.1 μm to 0.5 μm.