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公开(公告)号:US20180110164A1
公开(公告)日:2018-04-19
申请号:US15783330
申请日:2017-10-13
Applicant: IBIDEN CO., LTD
Inventor: Toshiki FURUTANI , Takema Adachi , Hidetoshi Noguchi , Shota Tachibana
CPC classification number: H05K9/0086 , H05K9/003 , H05K9/0084 , H05K9/0088 , H05K13/0084 , H05K2201/0338 , H05K2201/0707
Abstract: A shield cap for protecting an electronic component includes a cap member having a ceiling portion, a side wall portion and a partition wall portion, and a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves. The cap member is formed such that the ceiling portion has an inner region and an outer region surrounding the inner region, the side wall portion is supporting the outer region, and the partition wall portion is supporting the inner region, the ceiling portion has a first surface facing the side wall portion and the partition portion and a second surface on the opposite side and includes a reinforcing material positioned between the first and second surfaces, and the cap member is formed such that the side wall, ceiling and partition wall portions are forming multiple accommodation spaces to accommodate multiple electronic components.
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公开(公告)号:US20180110161A1
公开(公告)日:2018-04-19
申请号:US15782349
申请日:2017-10-12
Applicant: IBIDEN CO., LTD.
Inventor: Toshiki FURUTANI , Takema ADACHI , Hidetoshi NOGUCHI , Shota TACHIBANA
CPC classification number: H05K9/0073 , H01L23/552 , H01L23/60 , H01L2924/1432 , H01L2924/1434 , H01L2924/16251 , H01L2924/1679 , H01L2924/3025 , H01L2924/3512 , H05K3/4697 , H05K9/003 , H05K9/0088
Abstract: A shield cap for protecting an electronic component includes a cap member having a side wall portion and a ceiling portion, and a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves. The side wall and ceiling portions are forming accommodation space to accommodate electronic component, the ceiling portion has a first surface facing the space and a second surface on the opposite side, the side wall portion has a third surface facing the ceiling portion, a fourth surface on the opposite side, a fifth surface facing the space, and a sixth surface on the opposite side, and the side wall portion is formed such that the sixth surface has a first inclined portion increasing distance to the space from the third toward fourth surfaces and a second inclined portion increasing distance to the space from the fourth toward third surfaces.
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公开(公告)号:US20160336261A1
公开(公告)日:2016-11-17
申请号:US14992197
申请日:2016-01-11
Applicant: IBIDEN CO., LTD.
Inventor: Toshiki FURUTANI , Shunsuke SAKAI , Yasushi INAGAKI
IPC: H01L23/498 , H01L25/065 , H01L23/055 , H05K1/03 , H01L23/31
CPC classification number: H01L23/49833 , H01L23/055 , H01L23/3121 , H01L23/3142 , H01L23/498 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/49894 , H01L25/0657 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2225/0651 , H01L2225/06517 , H01L2225/0652 , H01L2225/06572 , H05K1/0313 , H05K3/007 , H05K3/205 , H01L2924/00014
Abstract: A printed wiring board includes a resin insulating layer, a wiring conductor layer embedded in the insulating layer such that the conductor layer has a first surface exposed on a first surface side of the insulating layer, and a conductor post formed on a second surface of the conductor layer on the opposite side with respect to the first surface such that the conductor post has a side surface covered by the insulating layer. The conductor post has an end surface on the opposite with respect to the conductor layer such that the end surface of the conductor post is exposed on a second surface side of the insulating layer, and the conductor post has an end portion on a wiring conductor layer side such that the side surface in the end portion is a curved side surface which is bending outward increasingly toward from the conductor layer.
Abstract translation: 印刷电路板包括树脂绝缘层,布置在绝缘层中的布线导体层,使得导体层具有暴露在绝缘层的第一表面侧上的第一表面和形成在绝缘层的第二表面上的导体柱 导体层相对于第一表面在相对侧上,使得导体柱具有被绝缘层覆盖的侧表面。 所述导体柱相对于所述导体层具有相对的端面,使得所述导体柱的端面暴露在所述绝缘层的第二表面侧上,并且所述导体柱在布线导体层上具有端部 使得端部的侧面是从导体层向外侧朝外侧弯曲的弯曲侧面。
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公开(公告)号:US20160174372A1
公开(公告)日:2016-06-16
申请号:US14971309
申请日:2015-12-16
Applicant: IBIDEN CO., LTD.
Inventor: Yasushi INAGAKI , Toshiki FURUTANI
CPC classification number: H05K1/113 , H01L23/49822 , H01L23/49827 , H01L23/5383 , H01L23/5384 , H01L2224/0401 , H01L2224/16227 , H01L2224/16235 , H01L2224/16237 , H01L2924/15192 , H01L2924/15313 , H01L2924/18161 , H05K1/111 , H05K3/4682 , H05K2201/10674 , Y02P70/611
Abstract: A printed wiring board includes a first insulating layer having concave portions on first surface of the first insulating layer, a first conductor layer including first circuits formed in the concave portions, a second conductor layer including second circuits on second surface of the first insulating layer, a first via conductor connecting the first and second conductor layers, and a second insulating layer formed on the second surface of the first insulating layer and covering the second conductor layer. Each first circuit has upper, lower and side surfaces such that the upper surface is exposed from the first insulating layer and the side and lower surfaces are not roughened surfaces, each second circuit has top, back and side surfaces such that the side and back surfaces are roughened surfaces, and a thinnest first circuit has a line width L1 smaller than a line width L2 of a thinnest second circuit.
Abstract translation: 印刷电路板包括在第一绝缘层的第一表面上具有凹部的第一绝缘层,包括形成在凹部中的第一电路的第一导体层,在第一绝缘层的第二表面上包括第二电路的第二导体层, 连接第一和第二导体层的第一通孔导体以及形成在第一绝缘层的第二表面上并覆盖第二导体层的第二绝缘层。 每个第一电路具有上表面,下表面和侧表面,使得上表面从第一绝缘层暴露,并且侧表面和下表面不是粗糙表面,每个第二电路具有顶表面,背面和侧表面,使得侧表面和后表面 是粗糙表面,最薄的第一电路的线宽L1小于最薄的第二电路的线宽L2。
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5.
公开(公告)号:US20160021758A1
公开(公告)日:2016-01-21
申请号:US14799860
申请日:2015-07-15
Applicant: IBIDEN CO., LTD.
Inventor: Toshiki FURUTANI , Yasushi INAGAKI
CPC classification number: H05K1/09 , H05K1/0271 , H05K1/111 , H05K1/115 , H05K3/0017 , H05K3/103 , H05K3/205 , H05K3/4007 , H05K3/4038 , H05K2201/0341 , H05K2201/094 , H05K2203/0384 , Y02P70/611
Abstract: A printed wiring board includes an insulation layer, a first conductive layer embedded into first surface of the insulation layer, a second conductive layer formed on second surface of the insulation layer, a via conductor penetrating through the insulation layer and electrically connecting the first and second layers, and a solder-resist layer covering the first layer and having an opening structure forming an exposed structure of the first layer. The exposed structure is formed to connect an electronic component to the first layer, and the first layer has a barrier-metal layer and a metal layer on the first layer such that the barrier-metal layer is on surface of the first layer and includes metal different from metal forming the metal layer and that the metal layer is on surface of the barrier-metal layer in the exposed structure and protruding from the first surface of the insulation layer.
Abstract translation: 印刷布线板包括绝缘层,嵌入绝缘层的第一表面中的第一导电层,形成在绝缘层的第二表面上的第二导电层,穿过绝缘层的通孔导体,并将第一和第二 层,以及覆盖第一层并具有形成第一层的暴露结构的开口结构的阻焊层。 形成暴露结构以将电子部件连接到第一层,并且第一层在第一层上具有阻挡金属层和金属层,使得阻挡金属层在第一层的表面上并且包括金属 与形成金属层的金属不同,并且金属层位于暴露结构中的阻挡金属层的表面上并且从绝缘层的第一表面突出。
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公开(公告)号:US20150016079A1
公开(公告)日:2015-01-15
申请号:US14329453
申请日:2014-07-11
Applicant: IBIDEN CO., LTD.
Inventor: Toshiki FURUTANI , Takeshi FURUSAWA , Keisuke SHIMIZU , Yuichi NAKAMURA
IPC: H05K1/18
CPC classification number: H05K1/185 , H01L21/568 , H01L24/19 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/32225 , H01L2224/73267 , H01L2224/83005 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2924/15311 , H01L2924/1533 , H01L2924/18162 , H01L2924/19105 , H05K1/0203 , H05K1/113 , H05K3/0097 , H05K3/3489 , H05K3/4602 , H05K3/4673 , H05K2201/068 , H05K2201/094 , H05K2203/1536 , H05K2203/308 , H01L2224/19
Abstract: A wiring board includes a first resin insulation layer, an electronic component positioned on first surface of the first insulation layer, a second resin insulation layer formed on the first surface of the first insulation layer such that the second insulation layer is embedding the electronic component, a conductive layer formed on the second insulation layer, a third resin insulation layer formed on the conductive layer and second insulation layer, and a connection via conductor formed in the second insulation layer such that the connection via conductor is connecting electrode of the electronic component and conductive layer on the second insulation layer. The first insulation layer has a pad structure on second surface side of the first insulation layer on opposite side of the first surface, and the first insulation layer has coefficient of thermal expansion set lower than coefficients of thermal expansion of the second and third insulation layers.
Abstract translation: 布线板包括第一树脂绝缘层,位于第一绝缘层的第一表面上的电子部件,形成在第一绝缘层的第一表面上的第二树脂绝缘层,使得第二绝缘层嵌入电子部件, 形成在第二绝缘层上的导电层,形成在导电层和第二绝缘层上的第三树脂绝缘层和形成在第二绝缘层中的连接通孔导体,使得连接通孔导体是电子部件的连接电极和 第二绝缘层上的导电层。 第一绝缘层在第一绝缘层的与第一表面相对的第二表面侧具有衬垫结构,第一绝缘层的热膨胀系数设定为低于第二绝缘层和第三绝缘层的热膨胀系数。
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7.
公开(公告)号:US20140284820A1
公开(公告)日:2014-09-25
申请号:US14295528
申请日:2014-06-04
Applicant: IBIDEN CO., LTD.
Inventor: Toshiki FURUTANI , Daiki KOMATSU , Masatoshi KUNIEDA , Naomi FUJITA , Nobuya TAKAHASHI
CPC classification number: H05K1/113 , H01L21/4857 , H01L21/568 , H01L23/147 , H01L23/28 , H01L23/3128 , H01L23/49822 , H01L23/562 , H01L24/82 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/81192 , H01L2924/00013 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/351 , H05K1/0298 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/014 , H01L2924/00012 , H01L2924/00
Abstract: A substrate for mounting a semiconductor includes a first insulation layer having first and second surfaces on the opposite sides and having a penetrating hole penetrating through the first insulation layer, an electrode formed in the penetrating hole in the first insulation layer and having a protruding portion protruding from the second surface of the first insulation layer, a first conductive pattern formed on the first surface of the first insulation layer and connected to the electrode, a second insulation layer formed on the first surface of the first insulation layer and the first conductive pattern and having a penetrating hole penetrating through the second insulating layer, a second conductive pattern formed on the second insulation layer and for mounting a semiconductor element, and a via conductor formed in the penetrating hole in the second insulation layer and connecting the first and second conductive patterns.
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公开(公告)号:US20140014399A1
公开(公告)日:2014-01-16
申请号:US13754185
申请日:2013-01-30
Applicant: IBIDEN CO., LTD.
Inventor: Takashi KARIYA , Toshiki FURUTANI , Takeshi FURUSAWA
IPC: H05K1/02
CPC classification number: H05K1/02 , H01L21/486 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49894 , H01L2924/0002 , H05K1/0271 , H05K3/4644 , H05K2201/029 , H05K2201/09136 , H01L2924/00
Abstract: A printed wiring board includes a core substrate, first and second buildup structures on surfaces of the core, respectively, and first and second solder-resist layers on the first and second structures, respectively. The core includes insulative substrate, conductive layers on surfaces of the substrate and through-hole conductor connecting the conductive layers, the first structure includes interlayer insulation layer and conductive layer in the first structure, the second structure includes interlayer insulation layer and conductive layer in the second structure, a thickness between the outer surfaces of the first and second solder-resist layers is set in range of from 150 μm or greater and less than 380 μm, and at least one of the core, first and second structures, and first and second solder-resist layers includes reinforcing material in amount such that the board includes the material in amount in range of from 20 to 35 vol. %.
Abstract translation: 印刷电路板分别包括芯基板,在芯的表面上的第一和第二累积结构以及分别在第一和第二结构上的第一和第二阻焊层。 芯包括绝缘衬底,衬底表面上的导电层和连接导电层的通孔导体,第一结构包括第一结构中的层间绝缘层和导电层,第二结构包括层间绝缘层和导电层 第二结构,第一和第二阻焊层的外表面之间的厚度设定在150μm以上且小于380μm的范围内,以及芯,第一和第二结构中的至少一个,以及第一和第二结构 第二阻焊层包括增强材料,其量使得该板包括量为20至35体积的材料。 %。
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公开(公告)号:US20240008176A1
公开(公告)日:2024-01-04
申请号:US18343781
申请日:2023-06-29
Applicant: IBIDEN CO., LTD.
Inventor: Toshiki FURUTANI
IPC: H05K1/02
CPC classification number: H05K1/0298
Abstract: A wiring substrate includes a core substrate, a first build-up part formed on a first surface of the substrate and including insulating layers and conductor layers, and a second build-up part formed on a second surface of the substate on the opposite side with respect to the first surface and including insulating layers and conductor layers. The first build-up part includes a first region and a second region such that a distance between adjacent conductor layers in the second region is smaller than a distance between adjacent conductor layers in the first region, the conductor layers in the second region include second wirings having the minimum wiring width and the minimum inter-wiring distance that are smaller than the minimum wiring width and the minimum inter-wiring distance of first wirings of the conductor layers in the first region and the insulating layers are continuous in the first region and second region.
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公开(公告)号:US20180110159A1
公开(公告)日:2018-04-19
申请号:US15783053
申请日:2017-10-13
Applicant: IBIDEN CO., LTD.
Inventor: Toshiki FURUTANI , Takema ADACHI , Hidetoshi NOGUCHI , Shota TACHIBANA
CPC classification number: H05K9/0024 , B29C70/885 , B32B37/02 , B32B37/142 , H05K9/003 , H05K9/0079 , H05K9/0088
Abstract: A shield cap for protecting an electronic component includes a cap member having a side wall portion and a ceiling portion, a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves, and a metal layer formed on a portion of the side wall portion such that the metal layer is interposed between the conductive film and the portion of the side wall portion. The side wall and ceiling portions are forming an accommodation space to accommodate an electronic component, and the metal layer is formed on a surface of the side wall portion on the opposite side of a surface of the side wall portion facing the ceiling portion and interposed between the conductive film and the side wall portion.
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