公开(公告)号：US20170194288A1

公开(公告)日：2017-07-06

申请号：US14986727

申请日：2016-01-04

Applicant: Infineon Technologies AG

Inventor： Peter OSSIMITZ ,  Tobias JACOBS

IPC: H01L25/065 ,  H01L23/528 ,  H01L21/768 ,  H01L23/532 ,  H01L21/66 ,  H01L25/00 ,  H01L23/522 ,  H01L23/31

CPC classification number: H01L25/0652 ,  H01L21/76877 ,  H01L22/32 ,  H01L23/3171 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53219 ,  H01L23/53228 ,  H01L24/04 ,  H01L25/50 ,  H01L2225/06513

Abstract: Representative implementations of devices and techniques provide optimized electrical performance of interconnectivity components of multi-layer integrated circuits (IC) such as chip dice, for example. Different layers of the multi-layer IC include contact terminals that may be used to connect to circuits, systems, and carriers external to the IC.

公开(公告)号：US20150156872A1

公开(公告)日：2015-06-04

申请号：US14094862

申请日：2013-12-03

Applicant: Infineon Technologies AG

Inventor： Peter OSSIMITZ

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/10 ,  H05K1/09

CPC classification number: H05K1/111 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/0295 ,  H05K1/09 ,  H05K1/181 ,  H05K3/10 ,  H05K2201/09954 ,  H05K2201/10234 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/49147 ,  H01L2924/014 ,  H01L2924/00014

Abstract: An Integrated Circuit (IC) package comprises a package comprising a first set of pads having a pinout that is compatible with a chip core of a product family. A second set of pads are on substantially the same plane as the first set of pads and outside the package core. The second set of pads is configured to accommodate a circuit outside the chip core. The geometric center of the package core is different from the geometric center of the IC package.

Abstract translation: 集成电路（IC）封装包括包括具有与产品系列的芯片芯片兼容的引脚排列的第一组焊盘的封装。 第二组焊盘与第一组焊盘在基本相同的平面上，并且在封装芯之外。 第二组焊盘被配置为容纳芯片外部的电路。 封装芯的几何中心与IC封装的几何中心不同。