公开(公告)号：US20230306551A1

公开(公告)日：2023-09-28

申请号：US17702301

申请日：2022-03-23

Applicant: Intel Corporation

Inventor： Vidhya Krishnan ,  Niranjan Cooray ,  David Puffer ,  Ronald Silvas ,  Durgaprasad Bilagi ,  Aditya Navale

IPC: G06T1/20 ,  G06F12/02 ,  G06T1/60 ,  G06T9/00

CPC classification number: G06T1/20 ,  G06F12/0223 ,  G06T1/60 ,  G06T9/00 ,  G06F2212/401

Abstract: Described herein is a graphics processor comprising a processing resource configured to perform processing operations, a codec configured to compress and decompress data associated with the processing operations, and circuitry configured to calculate a metadata address for a compressed surface based on a flat virtual memory address mapping between the address of the compressed surface and the metadata address. The compressed surface is to store data associated with a processing operation to be performed by the processing resource and the metadata address is a virtual address that stores compression metadata for the compressed surface. The circuitry can configure the codec to access the compressed surface based on the compression metadata.

公开(公告)号：US20220138286A1

公开(公告)日：2022-05-05

申请号：US17133336

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： David Zage ,  Scott Janus ,  Ned M. Smith ,  Vidhya Krishnan ,  Siddhartha Chhabra ,  Rajesh Poornachandran ,  Tomer Levy ,  Julien Carreno ,  Ankur Shah ,  Ronald Silvas ,  Aravindh Anantaraman ,  David Puffer ,  Vedvyas Shanbhogue ,  David Cowperthwaite ,  Aditya Navale ,  Omer Ben-Shalom ,  Alex Nayshtut ,  Xiaoyu Ruan

IPC: G06F21/10 ,  G06F21/60 ,  G06T1/20 ,  G06F9/455

Abstract: Systems, apparatuses and methods may provide for encryption based technology. Data may be encrypted locally with a graphics processor with encryption engines. The graphics processor components may be verified with a root-of-trust and based on collection of claims. The graphics processor may further be able to modify encrypted data from a non-pageable format to a pageable format. The graphics processor may further process data associated with a virtual machine based on a key that is known by the virtual machine and the graphics processor.

公开(公告)号：US12243155B2

公开(公告)日：2025-03-04

申请号：US17357423

申请日：2021-06-24

Applicant: Intel Corporation

Inventor： Prasoonkumar Surti ,  Ronald Silvas ,  Karol A. Szerszen

IPC: G06T15/50 ,  G06T1/20 ,  G06T1/60 ,  G06T15/00 ,  G06T15/04 ,  G06T15/80

Abstract: Methods, systems and apparatuses may provide for technology that identifies first graphics data that is associated with spatially proximate positions. The technology identifies second graphics data that is associated with spatially proximate positions, and interleaves the first and the second graphics data across a plurality of storage tiles.

公开(公告)号：US10997086B1

公开(公告)日：2021-05-04

申请号：US16807430

申请日：2020-03-03

Applicant: Intel Corporation

Inventor： Joydeep Ray ,  Altug Koker ,  Aditya Navale ,  Ankur Shah ,  Murali Ramadoss ,  Ben Ashbaugh ,  Ronald Silvas

IPC: G06F12/10 ,  G06F12/1072

Abstract: Systems and methods for providing shared virtual memory addressing support for a host system are disclosed. In one embodiment, a graphics processor includes processing resources to perform graphics operations. A memory management unit (MMU) is coupled to the processing resources. The MMU to support a first virtual address size for managing allocation of non-shared virtual memory and to support a second virtual address size for managing allocation of shared virtual memory that is shared between the graphics processor and a host.

公开(公告)号：US11556480B2

公开(公告)日：2023-01-17

申请号：US17246954

申请日：2021-05-03

Applicant: Intel Corporation

Inventor： Joydeep Ray ,  Altug Koker ,  Aditya Navale ,  Ankur Shah ,  Murali Ramadoss ,  Ben Ashbaugh ,  Ronald Silvas

IPC: G06F12/10 ,  G06F12/1072

Abstract: Systems and methods for providing shared virtual memory addressing support for a host system are disclosed. In one embodiment, a graphics processor includes processing resources to perform graphics operations. A memory management unit (MMU) is coupled to the processing resources. The MMU to support a first virtual address size for managing allocation of non-shared virtual memory and to support a second virtual address size for managing allocation of shared virtual memory that is shared between the graphics processor and a host.

公开(公告)号：US20220414977A1

公开(公告)日：2022-12-29

申请号：US17357423

申请日：2021-06-24

Applicant: Intel Corporation

Inventor： Prasoonkumar Surti ,  Ronald Silvas ,  Karol A. Szerszen

IPC: G06T15/50 ,  G06T15/80 ,  G06T15/04 ,  G06T15/00 ,  G06T1/60 ,  G06T1/20

Abstract: Methods, systems and apparatuses may provide for technology that identifies first graphics data that is associated with spatially proximate positions. The technology identifies second graphics data that is associated with spatially proximate positions, and interleaves the first and the second graphics data across a plurality of storage tiles.

公开(公告)号：US20210279181A1

公开(公告)日：2021-09-09

申请号：US17246954

申请日：2021-05-03

Applicant: Intel Corporation

Inventor： Joydeep Ray ,  Altug Koker ,  Aditya Navale ,  Ankur Shah ,  Murali Ramadoss ,  Ben Ashbaugh ,  Ronald Silvas

IPC: G06F12/1072

Abstract: Systems and methods for providing shared virtual memory addressing support for a host system are disclosed. In one embodiment, a graphics processor includes processing resources to perform graphics operations. A memory management unit (MMU) is coupled to the processing resources. The MMU to support a first virtual address size for managing allocation of non-shared virtual memory and to support a second virtual address size for managing allocation of shared virtual memory that is shared between the graphics processor and a host.

公开(公告)号：US09478000B2

公开(公告)日：2016-10-25

申请号：US14039495

申请日：2013-09-27

Applicant: INTEL CORPORATION

Inventor： Jayanth Rao ,  Pavan Lanka ,  Ronald Silvas

IPC: G06T1/60 ,  G06T1/20 ,  G06F12/02

CPC classification number: G06T1/60 ,  G06F12/0284 ,  G06F2212/251 ,  G06T1/20 ,  G06T2200/28

Abstract: A method for sharing memory between a central processing unit (CPU) and an input/output (I/O) device of a computing device is described. The method may include creating an allocation of memory for the I/O device to operate on. The method includes detecting whether the allocation is not page-aligned, wherein an allocation is page-aligned when its base address and size be evenly divisible by the applicable page-size. The allocation may be successfully shared, even if not page-aligned, even if an operating system of the computing device doesn't support sharing of non-page-aligned allocations.

Abstract translation: 描述了一种用于在计算设备的中央处理单元（CPU）和输入/输出（I / O）设备之间共享存储器的方法。 该方法可以包括为I / O设备创建用于操作的存储器的分配。 该方法包括检测分配是否不是页对齐的，其中当基地址和大小可以被适用的页面大小相等地分割时，分配是页对齐的。 即使不是页面对齐，即使计算设备的操作系统不支持非页面对齐分配的共享，分配也可以被成功地共享。