Abstract:
A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals in the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.
Abstract:
Terminal portions are arrayed at regular widths and regular intervals, and each face any enable terminal, and are electrically connected to the enable terminals by conductive particles. A lead portion is connected to the other terminal portion except for a pair of terminal portions which is a pair of terminal portions adjacent to each other, and extends from an overlap region to a lead region. A connection portion connects the respective terminal portions that are not connected with the lead portion to the adjacent terminal portions that are connected to the lead portion within an area of the overlap region. An interval between a pair of lead portions extending from a pair of connection portions located to sandwich a pair of terminal portions that are not connected with the lead portion therebetween is larger than an interval between the other adjacent lead portions.
Abstract:
A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals is the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.
Abstract:
Terminal portions are arrayed at regular widths and regular intervals, and each face any enable terminal, and are electrically connected to the enable terminals by conductive particles. A lead portion is connected to the other terminal portion except for a pair of terminal portions which is a pair of terminal portions adjacent to each other, and extends from an overlap region to a lead region. A connection portion connects the respective terminal portions that are not connected with the lead portion to the adjacent terminal portions that are connected to the lead portion within an area of the overlap region. An interval between a pair of lead portions extending from a pair of connection portions located to sandwich a pair of terminal portions that are not connected with the lead portion therebetween is larger than an interval between the other adjacent lead portions.
Abstract:
A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals in the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.
Abstract:
Terminal portions are arrayed at regular widths and regular intervals, and each face any enable terminal, and are electrically connected to the enable terminals by conductive particles. A lead portion is connected to the other terminal portion except for pair of terminal portions which is a pair of terminal portions adjacent to each other, and extends from an overlap region to a lead region. A connection portion connects the respective terminal portions that are not connected with the lead portion to the adjacent terminal portions that are connected to the lead portion within an area of the overlap region. An interval between a pair of lead portions extending from a pair of connection portions located to sandwich a pair of terminal portions that are not connected with the lead portion therebetween is larger than an interval between the other adjacent lead portions.
Abstract:
A terminal connection structure includes plural first connection terminals which are arranged side by side in one direction on a first circuit substrate, and plural second connection terminals which are arranged side by side in the one direction on a second resin circuit substrate overlappingly connected to the first circuit substrate and are respectively connected to the plural first connection terminals. Each of the plural second connection terminals includes plural first wirings extending in a direction crossing the one direction, and a second wiring connected to the plural first wirings and extending in the one direction. The second wiring is provided in a region where the second circuit substrate is overlapped and connected to the first circuit substrate.
Abstract:
An integrated circuit chip includes first and second electrode terminals electrically connected to an internal circuit, and a dummy bump arranged between the first and second electrode terminals on a back surface thereof. A wiring pattern includes first lines electrically connected to the first electrode terminals below the back surface of the integrated circuit chip and extend in the direction toward a display region outside the integrated circuit chip, and second lines electrically connected to the second electrode terminals below the back surface of the integrated circuit chip and extend in the direction opposite to the display region outside the integrated circuit chip. The dummy bump is configured to avoid at least one of the electrical connection between the dummy bump and all of the first lines and all of the second lines and the electrical connection between the dummy bump and the internal circuit.