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公开(公告)号:US11538682B2
公开(公告)日:2022-12-27
申请号:US16761054
申请日:2018-10-16
Inventor: Ming-Hui Chiu , Hao-Ling Tang , Lain-Jong Li
Abstract: A method for growing a transition metal dichalcogenide layer involves arranging a substrate having a first transition metal contained pad is arranged in a chemical vapor deposition chamber. A chalcogen contained precursor is arranged upstream of the substrate in the chemical vapor deposition chamber. The chemical vapor deposition chamber is heated for a period of time during which a transition metal dichalcogenides layer, containing transition metal from the first transition metal contained pad and chalcogen from the chalcogen contained precursor, is formed in an area adjacent to the first transition metal contained pad.
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公开(公告)号:US11329170B2
公开(公告)日:2022-05-10
申请号:US17134984
申请日:2020-12-28
Inventor: Ming-Yang Li , Jing-Kai Huang , Lain-Jong Li
IPC: H01L29/861 , H01L21/02 , H01L29/24 , H01L29/66
Abstract: A method for forming a semiconductor device having a lateral semiconductor heterojunction involves forming a first metal chalcogenide layer of the lateral semiconductor heterojunction adjacent to a first metal electrode on a substrate. The first metal chalcogenide layer includes a same metal as the first metal electrode and at least some of the first metal chalcogenide layer includes metal from the first metal electrode. A second metal chalcogenide layer of the lateral semiconductor heterojunction is formed adjacent to the first metal chalcogenide layer. A second metal electrode is formed adjacent to the second metal chalcogenide layer. The second metal chalcogenide layer includes a same metal as the second metal electrode.
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公开(公告)号:US11133522B2
公开(公告)日:2021-09-28
申请号:US15772165
申请日:2016-12-13
Inventor: Lain-Jong Li , Jun Ming
IPC: H01M4/13 , H01M10/052 , H01M4/485 , H01M4/38 , H01M4/62 , H01M50/403 , H01M4/04 , H01M4/58 , H01M4/583 , H01M10/058 , H01M4/02
Abstract: The present disclosure provides for a lithium-sulfur battery with a dual blocking layer between the anode and cathode, providing for high storage capacity and improved performance.
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公开(公告)号:US11127591B2
公开(公告)日:2021-09-21
申请号:US16090758
申请日:2017-05-09
Applicant: King Abdullah University of Science and Technology , KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY
Inventor: Chao Zhao , Tien Khee Ng , Lain-Jong Li , Boon Siew Ooi , Ahmed Y. Alyameni , Munir M. Eldesouki
IPC: H01L29/10 , H01L21/02 , H01L29/06 , H01L29/267 , H01L23/29
Abstract: Methods of direct growth of high quality group III-V and group III-N based materials and semiconductor device structures in the form of nanowires, planar thin film, and nanowires-based devices on metal substrates are presented. The present compound semiconductor all-metal scheme greatly simplifies the fabrication process of high power light emitters overcoming limited thermal and electrical conductivity of nanowires grown on silicon substrates and metal thin film in prior art. In an embodiment the methods include: (i) providing a metal substrate; (ii) forming a transition metal dichalcogenide (TMDC) layer on a surface of the metal substrate; and (iii) growing a semiconductor epilayer on the transition metal dichalcogenide layer using a semiconductor epitaxy growth system. In an embodiment, the semiconductor device structures can be compound semiconductors in contact with a layer of metal dichalcogenide, wherein the layer of metal dichalcogenide is in contact with a metal substrate.
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公开(公告)号:US10998452B2
公开(公告)日:2021-05-04
申请号:US16754214
申请日:2018-09-20
Inventor: Ming-Yang Li , Jing-Kai Huang , Lain-Jong Li
IPC: H01L21/02 , H01L29/861 , H01L29/24 , H01L29/66
Abstract: A method for forming a semiconductor device having a lateral semiconductor heterojunction involves forming a first metal chalcogenide layer of the lateral semiconductor heterojunction adjacent to a first metal electrode on a substrate. The first metal chalcogenide layer includes a same metal as the first metal electrode and at least some of the first metal chalcogenide layer includes metal from the first metal electrode. A second metal chalcogenide layer of the lateral semiconductor heterojunction is formed adjacent to the first metal chalcogenide layer. A second metal electrode is formed adjacent to the second metal chalcogenide layer. The second metal chalcogenide layer includes a same metal as the second metal electrode.
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6.
公开(公告)号:US10784353B2
公开(公告)日:2020-09-22
申请号:US16342432
申请日:2017-11-15
Inventor: Lain-Jong Li , Hao-Ling Tang , Ming-Hui Chiu
IPC: H01L29/267 , H01L29/16 , H01L29/24 , H01L29/66 , H01L29/76 , H01L29/786
Abstract: A device comprising: at least one first layer, such as a graphene layer, at least one second layer of transition metal dichalcogenide, wherein the at least one first layer and the at least one second layer of transition metal dichalcogenide form at least one heterojunction. The first and second layers are laterally displaced but may overlap over a length of 0 nm to 500 nm. A low-resistance contact is formed. The device can be a transistor including a field effect transistor. The layers can be formed by chemical vapor deposition. The graphene can be heavily p-doped. Transistor performance data are described.
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公开(公告)号:US10513792B2
公开(公告)日:2019-12-24
申请号:US15551107
申请日:2016-02-12
Inventor: Lain-Jong Li , Xiulin Yang , Ang-Yu Lu
Abstract: The present disclosure provides for methods of phosphidation, catalysts formed from phosphidation, and methods of producing H2.
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