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公开(公告)号：US20240420748A1
公开(公告)日：2024-12-19
申请号：US18336758
申请日：2023-06-16
Applicant: NVIDIA Corp.
Inventor： Cagri Erbagci , Burak Erbagci , Lalit Gupta , Jesse San-Jey Wang
Abstract: Negative bit line voltage assist mechanisms for multi-bank machine memories utilizing multiple local IO drivers include a shared boost capacitor configured to generate a negative bit line voltage assist for write operations by local IO drivers, where the boost capacitor is configured to selectively couple to one of the local IO drivers during the write operation.
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