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    Image processing device, image processing method, and image forming apparatus
    2.
    发明申请
    Image processing device, image processing method, and image forming apparatus 有权
    图像处理装置，图像处理方法和图像形成装置

    公开(公告)号：US20090303549A1

    公开(公告)日：2009-12-10

    申请号：US12457239

    申请日：2009-06-04

    Applicant: Norio Sakai

    Inventor： Norio Sakai

    IPC: H04N1/41

    CPC classification number: H04N1/46 ,  H04N1/203 ,  H04N1/2032 ,  H04N1/32358 ,  H04N1/32443 ,  H04N2201/0094

    Abstract: An image processing device including a first image reading unit to read image data on a front side of a document page, a second image reading unit to read image data on a back side of the document page, a first image processing unit to process the image data read by the first image reading unit, a second image processing unit to process the image data read by the second image reading unit, a memory to store image data, a memory control unit to control access to the memory, and a bus switch that connects the first image processing unit and the second image processing unit to the memory control unit. The bus switch includes a first compression unit to compress the image data processed by the first image processing unit, and a second compression unit to compress the image data processed by the second image processing unit.

    Abstract translation: 一种图像处理装置，包括：第一图像读取单元，用于读取文档页面的前侧上的图像数据;第二图像读取单元，用于读取文档页面的背面的图像数据;第一图像处理单元，用于处理图像 由第一图像读取单元读取的数据，用于处理由第二图像读取单元读取的图像数据的第二图像处理单元，存储图像数据的存储器，控制对存储器的存取的存储器控​​制单元以及总线开关， 将第一图像处理单元和第二图像处理单元连接到存储器控制单元。 总线开关包括用于压缩由第一图像处理单元处理的图像数据的第一压缩单元和用于压缩由第二图像处理单元处理的图像数据的第二压缩单元。

    Multilayer electronic part and structure for mounting multilayer electronic part
    6.
    发明申请
    Multilayer electronic part and structure for mounting multilayer electronic part 有权
    用于安装多层电子部件的多层电子部件和结构

    公开(公告)号：US20060281297A1

    公开(公告)日：2006-12-14

    申请号：US10554671

    申请日：2005-01-05

    Applicant: Nobuaki Ogawa ,  Norio Sakai

    Inventor： Nobuaki Ogawa ,  Norio Sakai

    IPC: H01L21/4763 ,  H01L23/48

    CPC classification number: H01L23/5384 ,  H01L23/5383 ,  H01L23/5389 ,  H01L2224/16225 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/1531 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/19105 ,  H01L2924/19106

    Abstract: A multilayer electronic component includes a multilayer substrate having a first main surface and a second main surface, a resin layer having a mounting surface and a contact surface bonded to the first main surface, a via conductor provided inside the resin layer, and an external terminal electrode disposed on the mounting surface so as to come in contact with the via conductor. The external terminal electrode has a first region on a main surface facing the mounting surface and a second region on a main surface facing away from the mounting surface. The first region is connected to the via conductor while the second region is provided with a bonding member. The second region is arranged such that, when the first region is projected through to the main surface facing away from the mounting surface, the second region is spaced from and does not overlap with a region in which the first region is projected.

    Abstract translation: 多层电子部件包括具有第一主表面和第二主表面的多层基板，具有安装表面和与第一主表面接合的接触表面的树脂层，设置在树脂层内部的通孔导体和外部端子 电极，其设置在安装表面上以与通孔导体接触。 外部端子电极在主表面上具有面向安装表面的第一区域和在远离安装表面的主表面上的第二区域。 第一区域连接到通孔导体，而第二区域设置有接合构件。 第二区域布置成使得当第一区域突出到远离安装表面的主表面时，第二区域与第一区域投影的区域间隔开并且不与第一区域突出的区域重叠。

    Mounting arrangement for multilayer electronic part
    10.
    发明授权
    Mounting arrangement for multilayer electronic part 有权
    多层电子零件的安装方式

    公开(公告)号：US06381120B2

    公开(公告)日：2002-04-30

    申请号：US09757959

    申请日：2001-01-10

    Applicant: Norio Sakai

    Inventor： Norio Sakai

    IPC: H01G406

    CPC classification number: H01G4/232 ,  H01F41/043 ,  H01G4/30 ,  H03H7/0115 ,  H03H2001/0085 ,  Y10T29/49126 ,  Y10T29/49165

    Abstract: A chip capacitor includes a multilayer body composed of a plurality of stacked sheet layers made of ceramics; capacitor electrodes and via hole electrodes disposed inside the multilayer body; and outer electrodes formed on only main surfaces of the multilayer body such that they are electrically connected to the capacitor electrodes via the via hole electrodes. Some of the capacitor electrodes are electrically connected by the via hole electrodes, and the other capacitor electrodes are electrically connected by other via hole electrodes.

    Abstract translation: 芯片电容器包括由陶瓷制成的多个堆叠的片层组成的多层体; 设置在多层体内的电容电极和通孔电极; 以及仅在多层体的主表面上形成的外部电极，使得它们经由通孔电极电连接到电容器电极。 一些电容器电极通过通孔电极电连接，另一个电容电极通过其它通孔电极电连接。

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