公开(公告)号：US11676974B2

公开(公告)日：2023-06-13

申请号：US17488263

申请日：2021-09-28

Applicant: PARADE TECHNOLOGIES, LTD.

Inventor： Yueh-Lin Yang ,  Haijun Chen ,  Tatao Hsu ,  Jonathan Huang

IPC: H01L27/12 ,  G02F1/1345

CPC classification number: H01L27/124 ,  G02F1/13452 ,  G02F1/13456 ,  G02F1/13458

Abstract: An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area has interconnects providing electrical accesses to display elements of the display area. The device has a driver chip disposed on the driver area. The driver chip includes a first edge adjacent to the display area and multiple pad groups, each pad group including a respective row of electronic pads that is (i) arranged substantially in parallel with the first edge and (ii) electrically coupled to a respective subset of display elements via respective interconnects routed on a respective region of the fan-out area. The pad groups include a first pad group and a second pad group. The first and second pad groups have two different distances from the first edge and correspond to two different subsets of interconnects routed on two non-overlapping regions of the fan-out area.

公开(公告)号：US20220384489A1

公开(公告)日：2022-12-01

申请号：US17488263

申请日：2021-09-28

Applicant: PARADE TECHNOLOGIES, LTD.

Inventor： Yueh-Lin Yang ,  Haijun Chen ,  Tatao Hsu ,  Jonathan Huang

IPC: H01L27/12 ,  G02F1/1345

Abstract: An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area has interconnects providing electrical accesses to display elements of the display area. The device has a driver chip disposed on the driver area. The driver chip includes a first edge adjacent to the display area and multiple pad groups, each pad group including a respective row of electronic pads that is (i) arranged substantially in parallel with the first edge and (ii) electrically coupled to a respective subset of display elements via respective interconnects routed on a respective region of the fan-out area. The pad groups include a first pad group and a second pad group. The first and second pad groups have two different distances from the first edge and correspond to two different subsets of interconnects routed on two non-overlapping regions of the fan-out area.

公开(公告)号：US11592715B2

公开(公告)日：2023-02-28

申请号：US17334370

申请日：2021-05-28

Applicant: PARADE TECHNOLOGIES, LTD.

Inventor： Yueh-Lin Yang ,  Quan Yu ,  Haijun Chen ,  Tatao Hsu ,  Jonathan Huang

IPC: G02F1/1345 ,  G09G3/36 ,  G06F3/041 ,  G06F3/044

Abstract: An electronic device has a display screen and a driver chip disposed on a driver area of the display screen. A fan-out area of the display screen has interconnects configured to provide electrical accesses to display elements of the display area. The driver chip includes a first edge, a second edge, and a row of electronic pads proximate to the first edge. The electronic pads have a first subset of end pads at a first end of the first row, a second subset of end pads at a second opposite end of the first row, and a subset of intermediate pads located between the first subset and second subset of end pads. The first subset of end pads physically contact a first subset of interconnects from the first edge, and the subset of intermediate pads physically contact a second subset of interconnects from the one or more second edges.

公开(公告)号：US20180190220A1

公开(公告)日：2018-07-05

申请号：US15904212

申请日：2018-02-23

Applicant: Parade Technologies, Ltd.

Inventor： Quan Yu ,  Ta-tao Hsu ,  Yueh-lin Yang ,  Haijun Chen ,  Kuo-cheng Huang ,  Nelson Rao

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/2092 ,  G09G3/3611 ,  G09G3/3685 ,  G09G2310/08 ,  G09G2330/021

Abstract: A method including receiving a first row of display data for a first time period, and determining a value of a specified bit position for first portions of a first plurality of multi-bit portions in the first row. The method further includes receiving a second row of display data for a second time period, and determining a value of the specified bit position for second portions of a second plurality of multi-bit portions in the second row. Based on the determining, identifying second portions that indicate a change in the value of the specified bit position from the first time period to the second time period, and identifying an output channel associated with each identified portion. The method further includes grouping each identified output channel into a first or second group based on a polarity type, and connecting the identified output channels together within each group.

公开(公告)号：US20180182329A1

公开(公告)日：2018-06-28

申请号：US15904208

申请日：2018-02-23

Applicant: Parade Technologies, Ltd.

Inventor： Quan Yu ,  CuiHua Jia ,  Ta-Tao Hsu ,  Yueh-Lin Yang ,  Haijun Chen ,  Kuo-Cheng Huang

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/3685 ,  G09G3/3688 ,  G09G2310/0297 ,  G09G2330/021

Abstract: A method including receiving information and a row of display data for display on a row of a display panel, sending the data to channels in accordance with the information, each channel supplying a portion of the row of display data to a column of pixels in the display panel using one a source driver, outputting, by a plurality of source drivers, the row of display data to the row of the display panel, and receiving a row completion indicator subsequent to the outputting. The method further includes determining, during a polarity period, a polarity state of a portion of the row of display data, identifying a group of source drivers, generating charge sharing enable signal(s) using the row completion indicator, and connecting outputs of source drivers in the identified group of source drivers together during the polarity period using the charge sharing enable signal(s).

公开(公告)号：US20220382094A1

公开(公告)日：2022-12-01

申请号：US17334370

申请日：2021-05-28

Applicant: PARADE TECHNOLOGIES, LTD.

Inventor： Yueh-Lin Yang ,  Quan Yu ,  Haijun Chen ,  Tatao Hsu ,  Jonathan Huang

IPC: G02F1/1345 ,  G09G3/36

Abstract: An electronic device has a display screen and a driver chip disposed on a driver area of the display screen. A fan-out area of the display screen has interconnects configured to provide electrical accesses to display elements of the display area. The driver chip includes a first edge, a second edge, and a row of electronic pads proximate to the first edge. The electronic pads have a first subset of end pads at a first end of the first row, a second subset of end pads at a second opposite end of the first row, and a subset of intermediate pads located between the first subset and second subset of end pads. The first subset of end pads physically contact a first subset of interconnects from the first edge, and the subset of intermediate pads physically contact a second subset of interconnects from the one or more second edges.