公开(公告)号：US12222611B2

公开(公告)日：2025-02-11

申请号：US18182268

申请日：2023-03-10

Applicant: PARADE TECHNOLOGIES, LTD

Inventor： You Ben Yin ,  Quan Yu ,  Yueh-Lin Yang

IPC: G02F1/1345 ,  G02F1/1333 ,  G06F3/041 ,  G06F3/044

Abstract: An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area is divided to a plurality of fan-out regions, and has interconnects configured to access display elements formed on the display area. The driver area is adjacent to the fan-out area and configured to receive a driver chip having a plurality of pads. The interconnects of the fan-out area include a subset of first interconnects. Each first interconnect passes a first fan-out region and a second fan-out region to access a respective display element. A first portion of the subset of first interconnects is formed on the first fan-out region with a first interconnect pitch, and a second portion of the subset of first interconnects is formed on the second fan-out region with a second interconnect pitch different from the first interconnect pitch.

公开(公告)号：US11676974B2

公开(公告)日：2023-06-13

申请号：US17488263

申请日：2021-09-28

Applicant: PARADE TECHNOLOGIES, LTD.

Inventor： Yueh-Lin Yang ,  Haijun Chen ,  Tatao Hsu ,  Jonathan Huang

IPC: H01L27/12 ,  G02F1/1345

CPC classification number: H01L27/124 ,  G02F1/13452 ,  G02F1/13456 ,  G02F1/13458

Abstract: An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area has interconnects providing electrical accesses to display elements of the display area. The device has a driver chip disposed on the driver area. The driver chip includes a first edge adjacent to the display area and multiple pad groups, each pad group including a respective row of electronic pads that is (i) arranged substantially in parallel with the first edge and (ii) electrically coupled to a respective subset of display elements via respective interconnects routed on a respective region of the fan-out area. The pad groups include a first pad group and a second pad group. The first and second pad groups have two different distances from the first edge and correspond to two different subsets of interconnects routed on two non-overlapping regions of the fan-out area.

公开(公告)号：US20220384489A1

公开(公告)日：2022-12-01

申请号：US17488263

申请日：2021-09-28

Applicant: PARADE TECHNOLOGIES, LTD.

Inventor： Yueh-Lin Yang ,  Haijun Chen ,  Tatao Hsu ,  Jonathan Huang

IPC: H01L27/12 ,  G02F1/1345

Abstract: An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area has interconnects providing electrical accesses to display elements of the display area. The device has a driver chip disposed on the driver area. The driver chip includes a first edge adjacent to the display area and multiple pad groups, each pad group including a respective row of electronic pads that is (i) arranged substantially in parallel with the first edge and (ii) electrically coupled to a respective subset of display elements via respective interconnects routed on a respective region of the fan-out area. The pad groups include a first pad group and a second pad group. The first and second pad groups have two different distances from the first edge and correspond to two different subsets of interconnects routed on two non-overlapping regions of the fan-out area.

公开(公告)号：US09418607B2

公开(公告)日：2016-08-16

申请号：US13961035

申请日：2013-08-07

Applicant: Parade Technologies, Ltd.

Inventor： Ta-Tao Hsu ,  Quan Yu ,  Yueh-Lin Yang

IPC: G09G3/36 ,  G09G3/20

CPC classification number: G09G3/3611 ,  G09G3/2092 ,  G09G2310/0213 ,  G09G2330/021

Abstract: A system and method are disclosed to utilize Gray code in order to reduce the power consumption of column drivers in a display system. Binary source data is received from a timing controller. A Gray code digitizer converts and encodes the binary source data into a binary portion of data and a Gray code data. The binary portion data and the Gray code data are transmitted through a shift register to a digital-to-analog converter. The shift register consumes less power processing the converted binary portion of data and Gray code data than the corresponding binary source data. The digital-to-analog converter decodes the Gray code and generates corresponding gamma voltage levels for display use.

Abstract translation: 公开了一种利用格雷码来降低显示系统中列驱动器的功耗的系统和方法。 从定时控制器接收二进制源数据。 格雷码数字转换器将二进制源数据转换并编码为二进制数据部分和格雷码数据。 二进制部分数据和格雷码数据通过移位寄存器传输到数模转换器。 与对应的二进制源数据相比，移位寄存器消耗更少的处理数据和格雷码数据的二进制部分的功率。 数模转换器解码格雷码，并产生相应的伽玛电压电平供显示使用。

公开(公告)号：US11592715B2

公开(公告)日：2023-02-28

申请号：US17334370

申请日：2021-05-28

Applicant: PARADE TECHNOLOGIES, LTD.

Inventor： Yueh-Lin Yang ,  Quan Yu ,  Haijun Chen ,  Tatao Hsu ,  Jonathan Huang

IPC: G02F1/1345 ,  G09G3/36 ,  G06F3/041 ,  G06F3/044

Abstract: An electronic device has a display screen and a driver chip disposed on a driver area of the display screen. A fan-out area of the display screen has interconnects configured to provide electrical accesses to display elements of the display area. The driver chip includes a first edge, a second edge, and a row of electronic pads proximate to the first edge. The electronic pads have a first subset of end pads at a first end of the first row, a second subset of end pads at a second opposite end of the first row, and a subset of intermediate pads located between the first subset and second subset of end pads. The first subset of end pads physically contact a first subset of interconnects from the first edge, and the subset of intermediate pads physically contact a second subset of interconnects from the one or more second edges.

公开(公告)号：US20230229044A1

公开(公告)日：2023-07-20

申请号：US18182268

申请日：2023-03-10

Applicant: PARADE TECHNOLOGIES, LTD

Inventor： You Ben Yin ,  Quan Yu ,  Yueh-Lin Yang

IPC: G02F1/1345 ,  G02F1/1333 ,  G06F3/041 ,  G06F3/044

CPC classification number: G02F1/13452 ,  G02F1/13458 ,  G02F1/13338 ,  G06F3/04166 ,  G06F3/0412 ,  G06F3/0443

Abstract: An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area is divided to a plurality of fan-out regions, and has interconnects configured to access display elements formed on the display area. The driver area is adjacent to the fan-out area and configured to receive a driver chip having a plurality of pads. The interconnects of the fan-out area include a subset of first interconnects. Each first interconnect passes a first fan-out region and a second fan-out region to access a respective display element. A first portion of the subset of first interconnects is formed on the first fan-out region with a first interconnect pitch, and a second portion of the subset of first interconnects is formed on the second fan-out region with a second interconnect pitch different from the first interconnect pitch.

公开(公告)号：US20180182329A1

公开(公告)日：2018-06-28

申请号：US15904208

申请日：2018-02-23

Applicant: Parade Technologies, Ltd.

Inventor： Quan Yu ,  CuiHua Jia ,  Ta-Tao Hsu ,  Yueh-Lin Yang ,  Haijun Chen ,  Kuo-Cheng Huang

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/3685 ,  G09G3/3688 ,  G09G2310/0297 ,  G09G2330/021

Abstract: A method including receiving information and a row of display data for display on a row of a display panel, sending the data to channels in accordance with the information, each channel supplying a portion of the row of display data to a column of pixels in the display panel using one a source driver, outputting, by a plurality of source drivers, the row of display data to the row of the display panel, and receiving a row completion indicator subsequent to the outputting. The method further includes determining, during a polarity period, a polarity state of a portion of the row of display data, identifying a group of source drivers, generating charge sharing enable signal(s) using the row completion indicator, and connecting outputs of source drivers in the identified group of source drivers together during the polarity period using the charge sharing enable signal(s).

公开(公告)号：US09361838B2

公开(公告)日：2016-06-07

申请号：US13961035

申请日：2013-08-07

Applicant: Parade Technologies, Ltd.

Inventor： Ta-Tao Hsu ,  Quan Yu ,  Yueh-Lin Yang

IPC: G09G3/36 ,  G09G3/20

Abstract: A system and method are disclosed to utilize Gray code in order to reduce the power consumption of column drivers in a display system. Binary source data is received from a timing controller. A Gray code digitizer converts and encodes the binary source data into a binary portion of data and a Gray code data. The binary portion data and the Gray code data are transmitted through a shift register to a digital-to-analog converter. The shift register consumes less power processing the converted binary portion of data and Gray code data than the corresponding binary source data. The digital-to-analog converter decodes the Gray code and generates corresponding gamma voltage levels for display use.

公开(公告)号：US20150042551A1

公开(公告)日：2015-02-12

申请号：US13961035

申请日：2013-08-07

Applicant: Parade Technologies, Ltd.

Inventor： Ta-Tao Hsu ,  Quan Yu ,  Yueh-Lin Yang

IPC: G09G3/36

CPC classification number: G09G3/3611 ,  G09G3/2092 ,  G09G2310/0213 ,  G09G2330/021

Abstract: A system and method are disclosed to utilize Gray code in order to reduce the power consumption of column drivers in a display system. Binary source data is received from a timing controller. A Gray code digitizer converts and encodes the binary source data into a binary portion of data and a Gray code data. The binary portion data and the Gray code data are transmitted through a shift register to a digital-to-analog converter. The shift register consumes less power processing the converted binary portion of data and Gray code data than the corresponding binary source data. The digital-to-analog converter decodes the Gray code and generates corresponding gamma voltage levels for display use.

Abstract translation: 公开了一种利用格雷码来降低显示系统中列驱动器的功耗的系统和方法。 从定时控制器接收二进制源数据。 格雷码数字转换器将二进制源数据转换并编码为二进制数据部分和格雷码数据。 二进制部分数据和格雷码数据通过移位寄存器传输到数模转换器。 与对应的二进制源数据相比，移位寄存器消耗更少的处理数据和格雷码数据的二进制部分的功率。 数模转换器解码格雷码，并产生相应的伽玛电压电平供显示使用。

公开(公告)号：US20220382094A1

公开(公告)日：2022-12-01

申请号：US17334370

申请日：2021-05-28

Applicant: PARADE TECHNOLOGIES, LTD.

Inventor： Yueh-Lin Yang ,  Quan Yu ,  Haijun Chen ,  Tatao Hsu ,  Jonathan Huang

IPC: G02F1/1345 ,  G09G3/36

Abstract: An electronic device has a display screen and a driver chip disposed on a driver area of the display screen. A fan-out area of the display screen has interconnects configured to provide electrical accesses to display elements of the display area. The driver chip includes a first edge, a second edge, and a row of electronic pads proximate to the first edge. The electronic pads have a first subset of end pads at a first end of the first row, a second subset of end pads at a second opposite end of the first row, and a subset of intermediate pads located between the first subset and second subset of end pads. The first subset of end pads physically contact a first subset of interconnects from the first edge, and the subset of intermediate pads physically contact a second subset of interconnects from the one or more second edges.