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1.发明公开公开(公告)号：US20240312949A1
公开(公告)日：2024-09-19
申请号：US18306971
申请日：2023-04-25
Applicant: PHISON ELECTRONICS CORP.
Inventor： Kang-Yun Yang , Yang-Tse Hung , Chao-Cheng Ku , Li-Yuan Lee
CPC classification number: H01L24/49 , G11C5/06 , G11C16/14 , H01L2224/4912
Abstract: A layout structure of differential lines, a memory storage device and a memory control circuit unit are provided. The layout structure of the differential lines includes a wiring layer, a first wire and a second wire. The first wire is arranged on the wiring layer and configured to transmit a first differential signal. The second wire is arranged on the wiring layer and configured to transmit a second differential signal. A first end of the first wire and a first end of the second wire are coupled to a first electrical component. A second end of the first wire and a second end of the second wire are coupled to a second electrical component. The first end of the first wire has a first bending structure. One of the second end of the first wire and the second end of the second wire has a second bending structure.
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公开(公告)号：US20240145952A1
公开(公告)日：2024-05-02
申请号：US18073546
申请日：2022-12-01
Applicant: PHISON ELECTRONICS CORP.
Inventor： Zong-Sian Ye , Yang-Tse Hung , Jin-Jia Chang , Bo-Yuan Wu
CPC classification number: H01R12/57 , H01R13/03 , H01R2201/06
Abstract: A gold finger connector and a memory storage device are disclosed. The gold finger connector includes: a connector body, a pin carrier, a plurality of first pins, a plurality of second pins, and at least one signal shielding structure. The pin carrier is protruded out of the connector body. The first pins are disposed on a first surface of the pin carrier. The second pins are disposed on the first surface and at least partially staggered with the first pins. The at least one signal shielding structure is disposed on the pin carrier and configured to conduct at least one target pin in the second pins to at least one ground layer.
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