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公开(公告)号:US09209818B2
公开(公告)日:2015-12-08
申请号:US14544382
申请日:2014-12-30
Applicant: Parade Technologies, Ltd.
Inventor: Ming Qu , Yuanping Chen , Yuntao Zhu , Quan Yu , Kochung Lee
CPC classification number: H03L7/087 , G01R29/26 , H03L7/0807 , H03L7/081 , H03L7/0998 , H04B17/104 , H04L1/205 , H04L1/243 , H04L7/033
Abstract: A system and method are disclosed for performing on die jitter tolerance testing. A set of clocks are generated based on an input signal. The set of clocks include in an in-phase signal based on the data switching edge of the input signal. Additionally, the set of clocks include an inverted clock phase shifted by 180 degrees, and a pair of clocks phase shifted positively and negatively by a certain number of degrees, θ. Data input is sampled based on the inverted clock and the two phase shifted clocks. The eye opening of the input signal can be determined based on whether each of the inverted clock and the two phase shifted clocks sample the correct data from the input signal at various θ values.
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公开(公告)号:US20250110913A1
公开(公告)日:2025-04-03
申请号:US18477470
申请日:2023-09-28
Applicant: PARADE TECHNOLOGIES, LTD.
Inventor: Hongquan Wang , Liang Xu , Feng Xu , Yuanping Chen , Mengchuan Gao
IPC: G06F13/42 , G06F1/3234
Abstract: This application is directed to controlling an electrical idle state of a retimer of a data communication channel. A receiving side of the retimer obtains an input signal including at least an exit command and a data sequence following the exit command. The exit command requests the retimer to exit a target energy saving state and transmit the data sequence. The retimer splits the input signal into two distinct signals including a control signal carrying the exit command and a data signal carrying the data signal. The retimer extends the exit command carried by the control signal, outputs the control signal carrying the extended exit command at an output of the retimer, and in accordance with a determination that the retimer has been equalized and locked, outputs the data signal carrying the data sequence at the output of the retimer.
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公开(公告)号:US20250076958A1
公开(公告)日:2025-03-06
申请号:US18241833
申请日:2023-09-01
Applicant: PARADE TECHNOLOGIES, LTD.
Inventor: Mengchuan GAO , Hongquan Wang , Shengyuan Zhang , Yuanping Chen , Jianhong LI
IPC: G06F1/32
Abstract: This application is directed to controlling a low power mode of a data communication channel. An electronic device includes an input interface for receiving an input signal. A signal conditioning circuit is coupled to the input interface, and configured to be disabled and consume power below a first threshold power level in a low power mode. A first signal detector is coupled to the signal conditioning circuit, and a second signal detector is coupled to the first signal detector. The first signal detector is configured to monitor a differential mode component of the input signal for controlling the signal conditioning circuit to exit the low power mode. The second signal detector is configured to, in the low power mode, detect a start of the input signal and enable the first signal detector based on a common mode component of the input signal.
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公开(公告)号:US12235781B2
公开(公告)日:2025-02-25
申请号:US18148949
申请日:2022-12-30
Applicant: PARADE TECHNOLOGIES, LTD.
Inventor: YingFan Lee , Mengchuan Gao , Yuanping Chen , Min She , Hongquan Wang
Abstract: A driver device of a data interface includes an input/output (I/O) interface, a power interface, a transmitter circuit, and a switching unit. The I/O interface is configured to couple to a load device. The power interface is configured to provide a power supply for transmitting data via the I/O interface. The transmitter circuit is coupled to the I/O interface and to the power interface and is configured to be powered by the power supply and provide an output signal to the load device via the I/O interface in a transmitter mode. The switching unit is coupled to the power interface and is configured to switch off the power interface for the transmitter circuit when the transmitter circuit is operating in a low power state. The transmitter circuit has a power consumption level below a threshold power level in the low power state.
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