公开(公告)号：US10255186B2

公开(公告)日：2019-04-09

申请号：US15623343

申请日：2017-06-14

Applicant: Purdue Research Foundation

Inventor： Ashish Ranjan ,  Swagath Venkataramani ,  Zoha Pajouhi ,  Rangharajan Venkatesan ,  Kaushik Roy ,  Anand Raghunathan

IPC: G06F12/08 ,  G06F12/0846 ,  G06F12/0891

Abstract: An approximate cache system is disclosed. The system includes a quality aware cache controller (QACC), a cache, a quality table configured to receive addresses and a quality specification from the processor associated with each address and further configured to provide the quality specification for each address to the QACC, wherein the QACC controls approximation is based on one or more of i) approximation through partial read operations; ii) approximation through lower read currents; iii) approximation through skipped write operations; iv) approximation through partial write operations; v) approximations through lower write duration; vi) approximation through lower write currents; and vii) approximations through skipped refreshes.

公开(公告)号：US11151040B2

公开(公告)日：2021-10-19

申请号：US16362672

申请日：2019-03-24

Applicant: Purdue Research Foundation

Inventor： Ashish Ranjan ,  Swagath Venkataramani ,  Zoha Pajouhi ,  Rangharajan Venkatesan ,  Kaushik Roy ,  Anand Raghunathan

IPC: G06F12/08 ,  G06F12/0846 ,  G06F12/0891 ,  G11C11/16 ,  G06F12/0864 ,  G06F12/02

Abstract: An approximate cache system is disclosed. The system includes a quality aware cache controller (QACC), a cache, a quality table configured to receive addresses and a quality specification from the processor associated with each address and further configured to provide the quality specification for each address to the QACC, wherein the QACC controls approximation is based on one or more of i) approximation through partial read operations; ii) approximation through lower read currents; iii) approximation through skipped write operations; iv) approximation through partial write operations; v) approximations through lower write duration; vi) approximation through lower write currents; and vii) approximations through skipped refreshes.

公开(公告)号：US20190220412A1

公开(公告)日：2019-07-18

申请号：US16362672

申请日：2019-03-24

Applicant: Purdue Research Foundation

Inventor： Ashish Ranjan ,  Swagath Venkataramani ,  Zoha Pajouhi ,  Rangharajan Venkatesan ,  Kaushik Roy ,  Anand Raghunathan

IPC: G06F12/0846 ,  G06F12/0891

CPC classification number: G06F12/0848 ,  G06F12/0238 ,  G06F12/0846 ,  G06F12/0864 ,  G06F12/0891 ,  G06F2212/1028 ,  G06F2212/604 ,  G06F2212/621 ,  G11C11/16 ,  G11C11/1673 ,  G11C11/1675

Abstract: An approximate cache system is disclosed. The system includes a quality aware cache controller (QACC), a cache, a quality table configured to receive addresses and a quality specification from the processor associated with each address and further configured to provide the quality specification for each address to the QACC, wherein the QACC controls approximation is based on one or more of i) approximation through partial read operations; ii) approximation through lower read currents; iii) approximation through skipped write operations; iv) approximation through partial write operations; v) approximations through lower write duration; vi) approximation through lower write currents; and vii) approximations through skipped refreshes.

公开(公告)号：US20180365154A1

公开(公告)日：2018-12-20

申请号：US15623343

申请日：2017-06-14

Applicant: Purdue Research Foundation

Inventor： Ashish Ranjan ,  Swagath Venkataramani ,  Zoha Pajouhi ,  Rangharajan Venkatesan ,  Kaushik Roy ,  Anand Raghunathan

IPC: G06F12/0846 ,  G06F12/0891

CPC classification number: G06F12/0848 ,  G06F12/0846 ,  G06F12/0891 ,  G06F2212/621

Abstract: An approximate cache system is disclosed. The system includes a quality aware cache controller (QACC), a cache, a quality table configured to receive addresses and a quality specification from the processor associated with each address and further configured to provide the quality specification for each address to the QACC, wherein the QACC controls approximation is based on one or more of i) approximation through partial read operations; ii) approximation through lower read currents; iii) approximation through skipped write operations; iv) approximation through partial write operations; v) approximations through lower write duration; vi) approximation through lower write currents; and vii) approximations through skipped refreshes.