公开(公告)号：US09171964B2

公开(公告)日：2015-10-27

申请号：US13296642

申请日：2011-11-15

Applicant: Robert D. Horning ,  Ryan Supino

Inventor： Robert D. Horning ,  Ryan Supino

IPC: H01L29/84 ,  B81B7/00

CPC classification number: H01L29/84 ,  B81B7/0032 ,  B81B7/0038 ,  B81B7/0074 ,  B81B7/0077 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/025 ,  B81C2201/019 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: Systems and methods for a micro-electromechanical system (MEMS) device are provided. In one embodiment, a system comprises a first outer layer and a first device layer comprising a first set of MEMS devices, wherein the first device layer is bonded to the first outer layer. The system also comprises a second outer layer and a second device layer comprising a second set of MEMS devices, wherein the second device layer is bonded to the second outer layer. Further, the system comprises a central layer having a first side and a second side opposite that of the first side, wherein the first side is bonded to the first device layer and the second side is bonded to the second device layer.

Abstract translation: 提供了一种用于微机电系统（MEMS）装置的系统和方法。 在一个实施例中，系统包括第一外层和包括第一组MEMS器件的第一器件层，其中第一器件层接合到第一外层。 该系统还包括第二外层和包括第二组MEMS器件的第二器件层，其中第二器件层结合到第二外层。 此外，该系统包括具有第一侧和与第一侧相反的第二侧的中心层，其中第一侧接合到第一器件层，第二侧接合到第二器件层。

公开(公告)号：US08078401B2

公开(公告)日：2011-12-13

申请号：US12019368

申请日：2008-01-24

Applicant: Ryan Supino ,  Robert D. Horning

Inventor： Ryan Supino ,  Robert D. Horning

IPC: G01C25/00 ,  G01C17/38 ,  G01C21/00

CPC classification number: G01C21/16 ,  G01S1/72 ,  G01S5/186 ,  G01S5/26

Abstract: A method of error compensation for an inertial measurement unit is provided. The method comprises providing a first object including an inertial measurement unit, providing a second object proximal to the first object, and determining an initial position and orientation of the first object. A motion update is triggered for the inertial measurement unit when the second object is stationary with respect to a ground surface. At least one position vector is measured between the first object and the second object when the first object is in motion and the second object is stationary. A distance, direction, and orientation of the second object with respect to the first object are calculated using the at least one position vector. An error correction is then determined for the inertial measurement unit from the calculated distance, direction, and orientation of the second object with respect to the first object.

Abstract translation: 提供了惯性测量单元的误差补偿方法。 该方法包括提供包括惯性测量单元的第一对象，提供靠近第一对象的第二对象，以及确定第一对象的初始位置和取向。 当第二物体相对于地面静止时，对于惯性测量单元触发运动更新。 当第一物体运动并且第二物体静止时，在第一物体和第二物体之间测量至少一个位置矢量。 使用至少一个位置矢量来计算第二对象相对于第一对象的距离，方向和方向。 然后根据计算出的第二物体相对于第一物体的距离，方向和取向来确定惯性测量单元的纠错。

公开(公告)号：US20100320595A1

公开(公告)日：2010-12-23

申请号：US12488847

申请日：2009-06-22

Applicant: Robert D. Horning ,  Jeff A. Ridley

Inventor： Robert D. Horning ,  Jeff A. Ridley

IPC: H01L23/02 ,  H01L23/48 ,  H01L21/50

CPC classification number: B81B7/007 ,  B81C2203/019 ,  H01L2224/48091 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A hermetically sealed MEMS device package comprises a MEMS device platform, a hermetic interface chip, and an outer seal ring. The MEMS device platform includes a MEMS device surrounded by a continuous outer boundary wall with a top surface. The hermetic interface chip includes a glass substrate and at least one silicon mesa. The glass substrate includes at least one hole and has a lower surface with an inner portion surrounded by an outer portion. The at least one silicon mesa is bonded to the inner portion of the lower surface of the glass substrate, such that the at least one silicon mesa is aligned with the at least one hole in the glass substrate. The outer seal ring bonds the outer portion of the lower surface of the glass substrate to the top surface of the continuous outer boundary wall of the MEMS device platform.

Abstract translation: 密封的MEMS器件封装包括MEMS器件平台，密封接口芯片和外部密封环。 MEMS器件平台包括由具有顶表面的连续外边界壁包围的MEMS器件。 密封接口芯片包括玻璃基板和至少一个硅台面。 玻璃基板包括至少一个孔，并且具有下表面，内部被外部包围。 至少一个硅台面结合到玻璃基板的下表面的内部，使得至少一个硅台面与玻璃基板中的至少一个孔对准。 外密封环将玻璃基板的下表面的外部部分结合到MEMS器件平台的连续外边界壁的顶表面。

公开(公告)号：US20100084752A1

公开(公告)日：2010-04-08

申请号：US12247368

申请日：2008-10-08

Applicant: Robert D. Horning ,  David S. Willits

Inventor： Robert D. Horning ,  David S. Willits

IPC: H01L23/02 ,  H01L21/50

CPC classification number: B81B7/007 ,  B81B7/0038

Abstract: Systems and methods for enabling hermetic sealing at the wafer level during fabrication of a microelectromechanical sensor (MEMS) device. The MEMS device has a specialized hermetic interface chip (HIC) that facilitates a stable hermetic sealing process. The HIC includes a plurality of vias in a substrate layer, a plurality of mesas having etched portions, a seal ring, a plurality of conductive leads on a first side of the HIC, and a plurality of conductive leads on a second side of the HIC. The plurality of conductive leads on the first side of the HIC feeds from the etched portions of the plurality of mesas through the plurality of vias in the substrate layer to the plurality of conductive leads on the second side of the HIC. The conductive leads are capable of connecting an external circuit to the MEMS device.

Abstract translation: 用于在制造微机电传感器（MEMS）器件期间在晶片级进行气密密封的系统和方法。 MEMS器件具有专门的密封接口芯片（HIC），有助于稳定的气密密封过程。 HIC在衬底层中包括多个通孔，具有蚀刻部分的多个台面，密封环，HIC的第一侧上的多个导电引线以及HIC的第二侧上的多个导电引线 。 HIC的第一侧上的多个导电引线从多个台面的蚀刻部分通过衬底层中的多个通孔馈送到HIC的第二侧上的多个导电引线。 导电引线能够将外部电路连接到MEMS器件。

公开(公告)号：US20090073045A1

公开(公告)日：2009-03-19

申请号：US12019380

申请日：2008-01-24

Applicant: Ryan Supino ,  Robert D. Horning

Inventor： Ryan Supino ,  Robert D. Horning

IPC: G01S3/02 ,  G01C21/00

CPC classification number: G01C21/00 ,  G01S1/72 ,  G01S5/186 ,  G01S5/26

Abstract: A lateration system comprising at least one transmitter attached to a first object and configured to emit pulses, three or more receivers attached to at least one second object and configured to receive the pulses emitted by the transmitter, and a processor configured to process information received from the three or more receivers, and to generate a vector based on lateration. Lateration is one of multilateration and trilateration. The vector is used by the processor to constrain error growth in a navigation solution.

Abstract translation: 一种后置系统，包括附接到第一对象并被配置为发射脉冲的至少一个发射器，连接到至少一个第二对象并被配置为接收由发射器发射的脉冲的三个或更多个接收器，以及被配置为处理从 三个或更多个接收器，并且基于后一个生成向量。 背景是多边和三边形之一。 处理器使用该向量来限制导航解决方案中的错误增长。

公开(公告)号：US06946200B2

公开(公告)日：2005-09-20

申请号：US10334588

申请日：2002-12-30

Applicant: Cleopatra Cabuz ,  Max C. Glenn ,  Francis M. Erdmann ,  Robert D. Horning

Inventor： Cleopatra Cabuz ,  Max C. Glenn ,  Francis M. Erdmann ,  Robert D. Horning

IPC: B81B3/00 ,  B81C1/00 ,  H01L21/308 ,  H01L29/84 ,  B32B9/00

CPC classification number: B81C1/00365 ,  B81C2201/0164 ,  Y10T428/21 ,  Y10T428/2495

Abstract: Layers of boron-doped silicon having reduced out-of-plane curvature are disclosed. The layers have substantially equal concentrations of boron near the top and bottom surfaces. Since the opposing concentrations are substantially equal, the compressive stresses on the layers are substantially balanced, thereby resulting in layers with reduced out-of-plane curvature.

Abstract translation: 公开了具有减小的平面外曲率的硼掺杂硅层。 这些层在顶部和底部表面附近具有基本相等的硼浓度。 由于相反的浓度基本相等，所以层上的压缩应力基本平衡，从而导致具有减小的面外曲率的层。

公开(公告)号：US06816636B2

公开(公告)日：2004-11-09

申请号：US09953506

申请日：2001-09-12

Applicant: Barrett E. Cole ,  Subash Krishnankutty ,  Robert D. Horning

Inventor： Barrett E. Cole ,  Subash Krishnankutty ,  Robert D. Horning

IPC: G02F1295

CPC classification number: G02B6/29361 ,  G01J3/26 ,  G02B6/29395 ,  G02F1/0147 ,  G02F1/015 ,  G02F1/21 ,  G02F2001/213 ,  G02F2203/055

Abstract: A tunable filter having a top mirror, a bottom mirror, and one or more intervening layers. The one or more intervening layers preferably have a refractive index that changes with temperature. By heating the one or more intervening layers, the wavelength that is selected by the optical filter can be controlled. The one or more intervening layers are preferably heated by passing current through the one or more intervening layers, or by passing current through a separate resistive layer that is thermally coupled to the one or more intervening layers. Such a filter can provide a high degree of wavelength selectivity in a robust and stable manner.

公开(公告)号：US06544655B1

公开(公告)日：2003-04-08

申请号：US09634932

申请日：2000-08-08

Applicant: Cleopatra Cabuz ,  Max C. Glenn ,  Francis M. Erdmann ,  Robert D. Horning

Inventor： Cleopatra Cabuz ,  Max C. Glenn ,  Francis M. Erdmann ,  Robert D. Horning

IPC: B32B904

CPC classification number: B81C1/00365 ,  B81C2201/0164 ,  Y10T428/21 ,  Y10T428/2495

Abstract: Layers of boron-doped silicon having reduced out-of-plane curvature are disclosed. The layers have substantially equal concentrations of boron near the top and bottom surfaces. Since the opposing concentrations are substantially equal, the compressive stresses on the layers are substantially balanced, thereby resulting in layers with reduced out-of-plane curvature.

公开(公告)号：US08748206B2

公开(公告)日：2014-06-10

申请号：US13295273

申请日：2011-11-14

Applicant: Robert D. Horning

Inventor： Robert D. Horning

IPC: H01L21/00

CPC classification number: B81B7/02 ,  B81B7/0041 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/025 ,  B81B2207/095 ,  B81B2207/096 ,  B81C2201/019 ,  H01L2224/48091 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Systems and methods for a micro-electromechanical system (MEMS) apparatus are provided. In one embodiment, a system comprises a first double chip that includes a first base layer; a first device layer bonded to the first base layer, the first device layer comprising a first set of MEMS devices; and a first top layer bonded to the first device layer, wherein the first set of MEMS devices is hermetically isolated. The system also comprises a second double chip that includes a second base layer; a second device layer bonded to the second base layer, the second device layer comprising a second set of MEMS devices; and a second top layer bonded to the second device layer, wherein the second set of MEMS devices is hermetically isolated, wherein a first top surface of the first top layer is bonded to a second top surface of the second top layer.

Abstract translation: 提供了一种用于微机电系统（MEMS）装置的系统和方法。 在一个实施例中，系统包括第一双芯片，其包括第一基层; 结合到第一基底层的第一器件层，第一器件层包括第一组MEMS器件; 以及结合到第一器件层的第一顶层，其中第一组MEMS器件被气密隔离。 该系统还包括第二双芯片，其包括第二基层; 结合到第二基层的第二器件层，第二器件层包括第二组MEMS器件; 以及结合到所述第二器件层的第二顶层，其中所述第二组MEMS器件是气密隔离的，其中所述第一顶层的第一顶表面接合到所述第二顶层的第二顶表面。

公开(公告)号：US20120142136A1

公开(公告)日：2012-06-07

申请号：US12957928

申请日：2010-12-01

Applicant: Robert D. Horning ,  Jeff A. Ridley

Inventor： Robert D. Horning ,  Jeff A. Ridley

IPC: H01L31/18

CPC classification number: B81C1/00301 ,  B81B2201/0242 ,  B81B2207/095 ,  B81C2203/0118 ,  B81C2203/031

Abstract: A process for packaging micro-electro-mechanical systems (MEMS) devices comprises providing a lower cover wafer and an upper cover wafer, providing a semiconductor wafer including a plurality of MEMS devices on a substrate layer, bonding the semiconductor wafer to a first surface of the lower cover wafer, and bonding a second surface of the upper cover wafer to the semiconductor wafer. The first surface of the lower cover wafer and the second surface of the upper cover wafer define a plurality of hermetically sealed cavity sections when bonded to the semiconductor wafer such that each of the MEMS devices is located inside one of the sealed cavity sections. A plurality of holes are formed that extend from the first surface of the upper cover wafer to the second surface of the upper cover wafer after the upper cover wafer is bonded to the semiconductor wafer. A metal lead layer is then deposited in each of the holes to provide an electrical connection with the MEMS devices.

Abstract translation: 一种用于封装微机电系统（MEMS）器件的方法包括提供下盖晶片和上盖晶片，在衬底层上提供包括多个MEMS器件的半导体晶片，将半导体晶片接合到第一表面 下盖晶片，并将上盖晶片的第二表面接合到半导体晶片。 当与半导体晶片接合时，下盖晶片的第一表面和上盖晶片的第二表面限定多个密封的空腔部分，使得每个MEMS器件位于一个密封空腔部分内。 在上盖晶片接合到半导体晶片之后，形成从上盖晶片的第一表面延伸到上盖晶片的第二表面的多个孔。 然后在每个孔中沉积金属引线层以提供与MEMS器件的电连接。