公开(公告)号：US20240253974A1

公开(公告)日：2024-08-01

申请号：US18102070

申请日：2023-01-26

Applicant: Rosemount Aerospace Inc.

Inventor： Roger Backman ,  Sarah Frink ,  David P. Potasek

IPC: B81B3/00 ,  B81C3/00

CPC classification number: B81B3/0021 ,  B81C3/001 ,  B81B2201/0264 ,  B81B2203/0109 ,  B81C2201/013

Abstract: A wafer die assembly includes a first wafer having at least a central cavity defined therein. The wafer die assembly includes a second wafer mounted to the first wafer. At least one of the first or second wafers includes an etched pattern. The etched pattern including at least one peripheral cavity, and a raised area raised relative to the peripheral cavity. A method of assembling a wafer die assembly includes etching a central cavity into a first wafer and etching a pattern into at least one of the first wafer or a second wafer. The first wafer and/or the second wafer includes a raised area raised relative to the peripheral cavity or the central cavity. The method includes bonding the second wafer to the first wafer.