公开(公告)号：US20140126166A1

公开(公告)日：2014-05-08

申请号：US13730408

申请日：2012-12-28

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Su Il Kim ,  Soon Jin Cho

IPC: H05K13/00 ,  H05K1/18

CPC classification number: H05K1/18 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/3025 ,  H05K3/303 ,  H05K2201/09909 ,  H05K2201/10674 ,  H05K2201/2036 ,  H05K2203/049 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Disclosed herein is a method of forming a solder resist (SR) post, including: (A) forming an SR layer on a printed circuit board; (B) disposing a patterning film on an upper surface on the SR layer; (C) forming a plurality of openings in the patterning film or the SR layer; (D) filling SR ink in the openings and performing an exposure process to form a plurality of SR posts; (E) delaminating the patterning film; (F) removing an uncured portion of the SR ink on which the exposure process is performed; and (G) drying the plurality of SR posts.

Abstract translation: 本文公开了一种形成阻焊剂（SR）柱的方法，包括：（A）在印刷电路板上形成SR层; （B）在SR层的上表面上配置图案化膜; （C）在图案化膜或SR层中形成多个开口; （D）在开口中填充SR墨水并执行曝光处理以形成多个SR柱; （E）分层图形膜; （F）去除进行曝光处理的SR墨水的未固化部分; 和（G）干燥多个SR柱。

公开(公告)号：US20150250050A1

公开(公告)日：2015-09-03

申请号：US14339155

申请日：2014-07-23

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Chang Bo LEE ,  Do Wan Kim ,  Soon Jin Cho

IPC: H05K1/03 ,  H05K3/10 ,  H05K3/32 ,  H05K3/30 ,  H05K1/09 ,  H05K1/11

CPC classification number: H05K3/4682 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/19 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82005 ,  H01L2224/8203 ,  H01L2224/92244 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/0097 ,  H05K3/4647 ,  H05K2203/0152 ,  H05K2203/1536 ,  Y10T29/4913 ,  H01L2224/83005

Abstract: Disclosed herein are an embedded board and a method of manufacturing the same. According to a preferred embodiment of the present invention, the embedded board includes: an outer layer insulating layer; an electronic device disposed inside the outer layer insulating layer; an outer layer circuit layer formed to protrude from one surface of the outer layer insulating layer; a first via formed on the outer layer insulating layer and electrically connecting the electronic device to the outer layer circuit layer; and a build up layer formed on the other surface of the outer layer insulating layer and including a build up insulating layer and a build up circuit layer.

Abstract translation: 这里公开了嵌入式电路板及其制造方法。 根据本发明的优选实施例，嵌入式板包括：外层绝缘层; 设置在所述外层绝缘层内的电子装置; 形成为从外层绝缘层的一个表面突出的外层电路层; 形成在所述外层绝缘层上并将所述电子器件电连接到所述外层电路层的第一通孔; 以及形成在外层绝缘层的另一个表面上并包括堆积绝缘层和积聚电路层的堆积层。

公开(公告)号：US08809122B2

公开(公告)日：2014-08-19

申请号：US14039392

申请日：2013-09-27

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Ey Yong Kim ,  Young Hwan Shin ,  Soon Jin Cho ,  Jong Yong Kim ,  Jin Seok Lee

IPC: H01L21/02

CPC classification number: H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/31 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/83051 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of manufacturing a flip chip package includes: providing a board including a conductive pad disposed inside a mounting region of the board on which the electronic device is to be mounted, and a connection pad disposed outside the mounting region; forming a resin layer on the board; forming a trench by removing a part of the resin layer or forming an uneven portion at a portion of a surface of the resin layer; forming, on the trench or uneven portion, a dam member preventing leakage of an underfill between the mounting region and the connection pad; and mounting the electronic device on the mounting region.

Abstract translation: 一种制造倒装芯片封装的方法，包括：提供一个板，其包括布置在其上将要安装电子器件的板的安装区域内的导电焊盘和设置在安装区域外部的连接焊盘; 在板上形成树脂层; 通过去除树脂层的一部分或在树脂层的表面的一部分处形成凹凸部来形成沟槽; 在沟槽或不平坦部分上形成防止底部填充物在安装区域和连接焊盘之间泄漏的阻挡构件; 并将电子装置安装在安装区域上。

公开(公告)号：US20140153204A1

公开(公告)日：2014-06-05

申请号：US13776612

申请日：2013-02-25

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Moon Il Kim ,  Yong Soon Jang ,  Byoung Hwa Lee ,  Hyun Kyung Park ,  Soon Jin Cho

IPC: H05K1/18 ,  H05K3/32

CPC classification number: H05K3/321 ,  H01L21/568 ,  H01L2224/04105 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2203/0191 ,  H05K2203/1469 ,  Y02P70/611 ,  Y10T29/49139

Abstract: The present invention relates to an electronic component embedded printed circuit board and a method for manufacturing the same.An electronic component embedded printed circuit board of the present invention includes a core having a cavity; an electronic component inserted in the cavity and having a bonding coating layer on an outer peripheral surface; insulating layers laminated on and under the core and in contact with the bonding coating layer; and circuit patterns provided on the insulating layers.

Abstract translation: 电子元件嵌入式印刷电路板及其制造方法技术领域本发明涉及电子元件嵌入式印刷电路板及其制造方法。 本发明的电子部件嵌入式印刷电路板包括具有空腔的芯体; 电子部件，其插入到所述空腔中，并且在外周面上具有接合涂层; 绝缘层层压在芯上和下面并与接合涂层接触; 以及设置在绝缘层上的电路图案。

公开(公告)号：US20130243941A1

公开(公告)日：2013-09-19

申请号：US13889064

申请日：2013-05-07

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Seok Kyu LEE ,  Soon Oh Jung ,  Jong Kuk Hong ,  Soon Jin Cho

IPC: H05K3/00

CPC classification number: H05K3/00 ,  H05K1/113 ,  H05K3/0052 ,  H05K3/007 ,  H05K3/4007 ,  H05K3/426 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2203/0156 ,  H05K2203/054 ,  H05K2203/1572

Abstract: A method of manufacturing a coreless substrate having filled via pads, including: forming a first insulating layer on one side of a carrier forming a build-up layer including a build-up insulating layer and a build-up circuit layer having a build-up via on the first insulating layer, and forming a second insulating layer on the build-up layer; removing the carrier, and forming via-holes in the first and second insulating layers; and conducting a filled plating process in the via-holes of the first and second insulating layers thus forming first and second filled via pads therein.

Abstract translation: 一种制造具有填充通孔焊盘的无芯基板的方法，包括：在载体的一侧上形成第一绝缘层，形成包含积聚绝缘层的堆积层和具有堆积层的积聚电路层 通过所述第一绝缘层，并且在所述积层上形成第二绝缘层; 移除所述载体，以及在所述第一和第二绝缘层中形成通孔; 并且在第一和第二绝缘层的通孔中进行填充电镀处理，从而在其中形成第一和第二填充的通孔焊盘。