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公开(公告)号:US20230318473A1
公开(公告)日:2023-10-05
申请号:US17822852
申请日:2022-08-29
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Roman MAZGUT , Tomas TICHY
CPC classification number: H02M3/33592 , H02M1/08 , H02M3/01
Abstract: Systems for power conversion, and controllers and methods for operating a power converter. The method includes receiving high-side and low-side primary signals that drive primary transistors of a power converter. The method also includes receiving a combined drain voltage signal for high-side and low-side synchronous rectifier (SR) transistors of the power converter. The method further includes generating a high-side SR signal based on the low-side primary signal and generating a low-side SR signal based on the high-side primary signal. The method also includes determining high-side and low-side body diode conduction times based on the combined drain voltage signal. The method further includes adjusting the high-side SR signal based on the high-side body diode conduction time and adjusting the low-side SR signal based on the low-side body diode conduction time.
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公开(公告)号:US20220345035A1
公开(公告)日:2022-10-27
申请号:US17646944
申请日:2022-01-04
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Roman MAZGUT
Abstract: Methods for operating an interleaved resonant power converter, and systems and apparatuses for power conversion. The method includes generating a first pair of complementary signals to drive a first stage of the interleaved resonant power converter. The method also includes generating a second pair of complementary signals to drive a second stage of the interleaved resonant power converter. The method further includes generating a current-mode control signal based on a current sense signal of the first stage. The method also includes adjusting a switching frequency of the first pair of complementary signals based on the current-mode control signal. The method further includes adjusting a switching frequency of the second pair of complementary signals to match the switching frequency of the first pair of complementary signals.
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公开(公告)号:US20220060121A1
公开(公告)日:2022-02-24
申请号:US17301393
申请日:2021-04-01
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Roman MAZGUT
IPC: H02M3/335
Abstract: Current balancing for interleaved power converters. One example is a method of operating a power converter comprising: operating, at a switching frequency, a first power converter defining a first resonant primary, the first power converter provides a first portion of a total power provided to a load; operating, at the switching frequency, a second power converter defining a second resonant primary, the second power converter provides a second portion of the total power provided to the load; and limiting a resonant voltage of the first resonant primary by controlling energy in the first resonant primary, the controlling during periods of time when the first portion is larger than the second portion.
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公开(公告)号:US20200044569A1
公开(公告)日:2020-02-06
申请号:US16597594
申请日:2019-10-09
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Vaclav DRDA , Roman STULER , Roman MAZGUT
Abstract: In one embodiment, a resonant converter circuit may be formed to include a light-load control circuit that forms a sequence to control one or more transistors wherein the sequence includes a drive interval having a drive pattern to drive the one or more transistors and a subsequent Off-interval wherein the one or more transistors are switched. A first circuit of the light-load control circuit may be configured to form the drive pattern as a repeated sequence of a pulse set that sequentially enables the one or more transistors with a base set followed by a number of non-switching intervals wherein each non-switching interval is a period of a signal formed in response to driving the one or more transistors with the base set.
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公开(公告)号:US20180337607A1
公开(公告)日:2018-11-22
申请号:US15600282
申请日:2017-05-19
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Vaclav DRDA , Roman STULER , Roman MAZGUT
Abstract: In one embodiment, a resonant converter circuit may be formed to include a light-load control circuit that forms a sequence to control one or more transistors wherein the sequence includes a drive interval having a drive pattern to drive the one or more transistors and a subsequent Off-interval wherein the one or more transistors are switched. A first circuit of the light-load control circuit may be configured to form the drive pattern as a repeated sequence of a pulse set that sequentially enables the one or more transistors with a base set followed by a number of non-switching intervals wherein each non-switching interval is a period of a signal formed in response to driving the one or more transistors with the base set.
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