SYNCHRONOUS RECTIFICATION CONTROL IN LLC TOPOLOGY

    公开(公告)号:US20230318473A1

    公开(公告)日:2023-10-05

    申请号:US17822852

    申请日:2022-08-29

    CPC classification number: H02M3/33592 H02M1/08 H02M3/01

    Abstract: Systems for power conversion, and controllers and methods for operating a power converter. The method includes receiving high-side and low-side primary signals that drive primary transistors of a power converter. The method also includes receiving a combined drain voltage signal for high-side and low-side synchronous rectifier (SR) transistors of the power converter. The method further includes generating a high-side SR signal based on the low-side primary signal and generating a low-side SR signal based on the high-side primary signal. The method also includes determining high-side and low-side body diode conduction times based on the combined drain voltage signal. The method further includes adjusting the high-side SR signal based on the high-side body diode conduction time and adjusting the low-side SR signal based on the low-side body diode conduction time.

    SWITCHING DEVICE CONTROL WITH SECOND ASSERTION OF DRIVE SIGNAL DURING CONDUCTION PHASE

    公开(公告)号:US20180323719A1

    公开(公告)日:2018-11-08

    申请号:US16039521

    申请日:2018-07-19

    Abstract: A synchronous rectifier controller includes an exception timer, one or more blanking timers, and control logic. The control logic may detect a beginning of a conduction phase using a current sense signal. In response to detecting the beginning of the conduction phase, the control logic commences the exception timer, commences a first blanking interval, and asserts the drive signal. In response to an OFF condition being detected, the first blanking interval being elapsed, and the exception timer being running, the control logic de-asserts the drive signal and commences a second blanking interval. In response to an ON condition being detected, the second blanking interval being elapsed, and the exception timer being running, the control logic commences a third blanking interval and asserts the drive signal. The control logic may assert and de-assert the drive signal multiple times while the exception timer is running.

    SYSTEMS AND METHODS OF SYNCHRONOUS RECTIFICATION IN ACTIVE CLAMP FLYBACK POWER CONVERTERS

    公开(公告)号:US20210119548A1

    公开(公告)日:2021-04-22

    申请号:US16948417

    申请日:2020-09-17

    Abstract: Synchronous rectification in active clamp flyback power converters. At least some example embodiments are methods including: sensing a first slope of voltage on a secondary winding of the transformer, the first slope indicative of the power converter entering a charge mode of the transformer; modifying, responsive the sensing, an operational state of a secondary rectifier (SR), driver coupled to a secondary rectifier; making the secondary rectifier conductive by the SR driver during a discharge mode of the transformer; sensing a second slope of voltage on the secondary of the transformer, the second slope indicative of ending of the discharge mode of the power converter; and then returning, responsive to sensing the second slope, the SR driver to an original operational state.

    METHOD AND APPARATUS FOR SYNCHRONOUS RECTIFIER

    公开(公告)号:US20180054132A1

    公开(公告)日:2018-02-22

    申请号:US15802623

    申请日:2017-11-03

    CPC classification number: H02M3/33523 H02M1/08 H02M3/33592 H02M2001/0009

    Abstract: A synchronous rectifier controller includes an exception timer, one or more blanking timers, and control logic. The control logic may detect a beginning of a conduction phase using a current sense signal. In response to detecting the beginning of the conduction phase, the control logic commences the exception timer, commences a first blanking interval, and asserts the drive signal. In response to an OFF condition being detected, the first blanking interval being elapsed, and the exception timer being running, the control logic de-asserts the drive signal and commences a second blanking interval. In response to an ON condition being detected, the second blanking interval being elapsed, and the exception timer being running, the control logic commences a third blanking interval and asserts the drive signal. The control logic may assert and de-assert the drive signal multiple times while the exception timer is running.

    PRECISE AND DYNAMIC CONTROL OF SYNCHRONOUS RECTIFICATION SWITCH VOLTAGE IN A SWITCHED MODE POWER SUPPLY
    6.
    发明申请
    PRECISE AND DYNAMIC CONTROL OF SYNCHRONOUS RECTIFICATION SWITCH VOLTAGE IN A SWITCHED MODE POWER SUPPLY 有权
    切换模式电源同步整流开关电压的精度和动态控制

    公开(公告)号:US20160204701A1

    公开(公告)日:2016-07-14

    申请号:US14596980

    申请日:2015-01-14

    CPC classification number: H02M3/1588 Y02B70/1466

    Abstract: A switched mode power supply, in some embodiments, comprises a synchronous rectification transistor switch including a gate, and it further comprises an output driver coupled to the gate and providing a driving signal to the gate. The driving signal is determined based on a dynamically controllable clamp signal and a prior driving signal.

    Abstract translation: 在一些实施例中,开关模式电源包括包括栅极的同步整流晶体管开关,并且还包括耦合到栅极并向栅极提供驱动信号的输出驱动器。 驱动信号基于可动态控制的钳位信号和先前的驱动信号来确定。

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